Intelligent power management integrated circuits for a greener, more efficient Internet of Things

Informations projet

NANOPOWER

N° de convention de subvention: 101145204

DOI

10.3030/101145204

Projet clôturé

Date de signature de la CE 9 Février 2024

Date de début 1 Janvier 2024

Date de fin 31 Decembre 2025

Financé au titre de

• The European Innovation Council (EIC)

Coût total

€ 3 552 500,00

Contribution de l’UE

€ 2 486 750,00

Coordonné par

NANOPOWER SEMICONDUCTOR AS
Norway

Periodic Reporting for period 2 - NANOPOWER (Intelligent power management integrated circuits for a greener, more efficient Internet of Things)

Période du rapport: 2025-01-01 au 2025-12-31

Résumé du contexte et des objectifs généraux du projet

Power consumption has always been and continues to be a key challenge for wireless sensors, wearables, and other battery-powered electronics. Such devices are being deployed in large numbers, and it is estimated that 78 million batteries will be discarded daily from such devices alone. Not only is this unsustainable from an environmental and resource point of view, but longevity and thus power consumption are key limitations for enabling new and large-scale applications.

The semiconductor industry continues to push towards lower power consumption. Sensor, wireless SoC, and other component manufacturers continue to improve, and power consumption is still the key challenge for any hardware designer. Still, a key element has been missing. Through a unique approach to decreasing the system-level power consumption and using our subthreshold design, Nanopower is giving hardware designers a new tool to create systems with lower power consumption and more functionality than ever before. The radically changed power consumption enables new applications, new functionality, a smaller form factor, and energy harvesting technologies as a key power source.

The project targeted and brought the Nanopower power saving IC, PSIC, to a stage where TRL8 could be achieved with a product ready for commercial scale-up.

Travail effectué depuis le début du projet jusqu’à la fin de la période considérée dans le rapport et principaux résultats atteints jusqu’à présent

Nanopower has designed, produced, and verified its unique power-saving IC.

The design has been completed and produced for the product to be available for customers on EVBs and engineering samples, enabling customers to test and design in the IC in their products.

Through the project to date, Nanopower has:

- Extensively tested and verified prototypes and engineering samples
- Developed and produced improved designs, implemented as full mask set, and metal mask modifications.
- Produced full wafers of the Gen1, including QFN engineering samples intended for customer use. Smaller chip-scale packages, WLCSP, have been developed and tooling is being produced.
- Developed and produced Development Kits, configuration tool, and online resources for developers seeking to use the Nanopower IC.
- Developed and produced full system integrations for various use-cases and demonstrators
- Delivered Development Kits and QFN samples to customers

At the end of the project, Nanopower is in the final phases of Release to Manufacturing, where the first Nanopower IC is officially signed-off for mass production. This includes completed qualification, test program sign-off, and characterization.

Progrès au-delà de l’état des connaissances et impact potentiel prévu (y compris l’impact socio-économique et les conséquences sociétales plus larges du projet jusqu’à présent)

Results and potential impacts:
- Testing of physical samples has proven that the Nanopower IC can be achieved with the expected performance and operating envelope
- Full wafer production and engineering samples enabled us to start commercial sales processes to achieve design wins – proving the commercial value of the technology and product
- We have overcome design challenges identified before and during the project and implemented these on silicon
- Current design is being taken to mass production through final characterization, test program completion, and qualification
- Through extensive testing and characterization, we have established unique competence in subthreshold design that will facilitate future product generations
Key success criteria and requirements:
- Distribution of samples on EVBs with adequate support from the Nanopower team, creating ambassadors and reference users
- Establishing the necessary sales team and channels. Key hirings ongoing
- Expanded with value-generating distribution channels; design houses, specialist distributors, high-service distributors. Release to manufacturing and volumes at distributors is key to commercial success
- Tools that enable designers to implement the Nanopower IC with minimum efforts
- Continued work towards transfer to production to achieve quality and yield targets.

Wireless energy harvesting system in collaboration with TDK

Nanopower Exhibiting at Embedded World 2025

Designed to help developers evaluate performance of the nPZero chip in various IoT applications

nPZero IC (QFN) redering

Nanopower exhibiting at Electronica India 2025. Customer Success Team manager, Torbjørn Øvrebekk

G1Y Wafer

nPZero DevKit

Test chip bonding

Nanopower Semiconductor Offices in Porto, Portugal

Test chip bonding

Nanopower on EE Times Solicon 100 - Startups Worth Watching

Nanopower Winner at Elektra Awards 2025. VP Sales Anthony Carter

Nanopower keynote speaker at Agderkonferansen 2024, CEO Tore Irgens Kuhnle