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Analogue Libraries on Low-Cost CMOS Digital Process

Objective

The main objective of the ALCD project is to allow system house designers to integrate mixed-mode analogue-digital applications in a low-cost mainstream digital CMOS technology, and this requires the development of new analogue design techniques necessary to meet the high-end specifications of an analogue library of cells.

By achieving the above-mentioned objectives, this project will contribute to the availability to European System Companies, including SMEs and SMT, of a competitive level compared to their US and Far Eastern competitors.

The results of this project will provide:

- access to a cheap technology
- a faster time to market
- the capability of designing mixed analogue-digital chips on advanced state-of-the-art digital process.

To be able to build the cells derived from the end-user application specifications, the Consortium will qualify new design techniques to allow high performance analogue design, preferably using the MOS transistor as the basic circuit element. The demonstration of the feasibility and cost efficiency of the developed techniques will be achieved through the integration of real end-users applications.

The Consortium will develop and qualify on silicon a library of high-end analogue functions. The library layouts will be released and distributed with their relevant documentation for exploitation by the partners. BOSCH and INTRACOM will use it to enlarge its design customer base in the ASIC cell-based market and thereby answer its customer requests.

The development of the library will be carried out in such a way that it meets the partners' applications needs target customers needs; offers the most attractive compromise between performances, functions and implementation flexibility (eg cell generators) in order to be attractive for a large range of customers; can later be portable from current 0.7 micron CMOS technology developed in the frame of ACCESS/JLP Project to 0.5 micron; is expandable to include further functions; is fully qualified on silicon; and is released with proper documentation on the most attractive partner's platform (eg CADENCE, MENTOR).

As soon as firm results become available from the research and development activities, the Consortium will use the Universities' information channels (eg conferences and journal publications) for dissemination. This will stimulate the acceptance by further designers and of course end-users of the technology and design techniques developed by the ALCD project. Throughout the development of the project, ES2 will also approach some of its most privileged customers to stimulate the adoption of the new design techniques and technology.

As soon as fully qualified cells become available, ES2 dissemination efforts will be directed towards the promotion of Design Kits that incorporate the ALCD library and are attached to the best-sold design platforms.

Topic(s)

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Call for proposal

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Funding Scheme

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Coordinator

EUROPEAN SILICON STRUCTURES SA
Address
Zone Industrielle
13106 Rousset
France
 

Participants (5)

INSTITUTO SUPERIOR TECNICO
Portugal
Address
Av. Rovisco Pais
1096 Lisboa Codex
 
INTRACOM
Greece
Address
Markopoulou Avenue, 19.5 Km, 68
19002 Peania
 
National Technical University of Athens
Greece
Address
Heroon Polytechniou 9
15773 Zographou, Athens
 
ROBERT BOSCH GMBH
Germany
Address
Tuebinger Strasse 123
72762 Reutlingen
 
UNIVERSITA DEGLI STUDI DI PAVIA
Italy
Address
Corso Strada Nuova 65
27100 Pavia