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Content archived on 2024-05-07

Hardware realisation of communication coding algorithms

Objective

- Introduction of an evolutionary system development cycle based on concurrent engineering principles, replacing the existing traditional electronics design chain.

- Minimising development time through the use of the new design methodology will reduce product cost and improve quality.

- Demonstration of the improvement in the design practice through the design of a high complexity ASIC.

- Targeted dissemination of activities to the Greek Electronics Industry.

An innovative design and development environment is to be introduced using advanced EDA software tools. The new design process solution will be used for the development of an electronic system for use in data communication for the purpose of data security and integrity. The heart of the system will be an ASIC designed to realise a coding algorithm. Benefits of using advanced ESD tools will be disseminated to specific industrial sectors.

Fields of science (EuroSciVoc)

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Programme(s)

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Topic(s)

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Call for proposal

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Funding Scheme

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ACM - Preparatory, accompanying and support measures

Coordinator

Econ Industries
EU contribution
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Address
Valaoritou 15
106 71 Athens
Greece

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Total cost

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