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Field programmable system on chip


- To develop a set of programmable analogue cells and routing resources. Cells will include analogue interfaces, DACs and ADC, amplifiers, filters. This function library will include a bridge to commercial standard-cell libraries to enable migration from programmed FIPSOC prototypes to classical ASIC solutions in case of large production volumes.

- The project will develop the first member of the FIPSOC family in a 0.5 micron CMOS process. It will integrate analogue functionality, approximately 5k programmable digital gates, an 8051 based microprocessor core, and programme/control memory.

- The project will develop a software toolkit to enable programming of both digital and analogue functionality as well as data processing and control functions undertaken by the on-board microprocessor. The toolkit will be PC based and include schematic capture, routing and chip interface capture and design functions.

- In order to demonstrate versatility, level of system integration and performance, the partners will use FIPSOC-1 in a number of industrial demonstrators including a coin recogniser for vending machines and a smart battery charger.

The aim is to develop the first member of a family of Field Programmable System-On-a-Chip (FIPSOC) devices. These circuits will integrate combinational logic blocks, programmable analogue cells for signal conditioning and data acquisition, and an on-board microprocessor. Configuration and control data will be stored in on-chip RAM memory. The on-board 8051 based microprocessor will be able to access both the configuration and the actual signals within the logic cells, providing a strong interaction between hardware and software. Standard, off-the-shelf FIPSOC devices will be configurable to a wide variety of tasks including analogue and digital data acquisition and processing as typically required by the electronic instrumentation and industrial process control sectors. Users can develop their own applications by implementing (programming) both hardware and software functions in the same device. The chip will be ideally suited as an easy-to-use system prototyping workbench as well as in low to medium volume product applications.

Funding Scheme

CSC - Cost-sharing contracts


Semiconductores Investigacion y Diseno
Ptm, Isaac Newton S.n.
28760 Tres Cantos

Participants (5)

Asociacion de Investigacion y Cooperacion Industrial de Andalucia
Avda. Reina Mercedes S/n, Edificio Escuela De Ingenieros
41012 Sevilla
Jofemar Sa
Carretera De Marcilla A Peralta 2Km
31350 Peralta
Breslauer Strasse 1-3
85386 Eching
Universitat Politecnica de Catalunya
Modulo 6
08071 Barcelona
Warwick Microsystems Ltd
United Kingdom
Olton Bridge, Warwick Road 245
B927AH Solihull