Objective
Within this project we intend to design and implement an optimising compiler that utilises aggressive analysis techniques, thereby integrating high and low-level optimisations. We target the following major goals. First, we will develop high-level restructuring techniques such as global data structure transformations and strategies for the application of transformations especially geared towards embedded applications.
Second, we will develop low-level restructuring techniques, concentrating on a highly retargetable object code scheduler that includes optimising techniques suited for embedded VLIW and superscalar architectures. Thirdly, we will integrate the above tasks by defining interaction between these two stages in the compiler. Some of the techniques that we plan to use have been already implemented for scientific computing, one of the major goal of the project is to adapt them to the specifics of embedded applications.
A shift towards the use of more general purpose processor architectures instead of developing application specific circuits can be observed when designing certain parts of embedded systems. More specifically, manufacturers are using RISC core technology to build high performance multi-purpose processors with multiple functional units for embedded systems, or use of-the-shelf high performance uniprocessors.
"Multi-purpose" in this context means that contrary to general purpose processors these architectures are designed for specific (embedded) application domains.
Although, more "standard'' technology is used, embedded applications and hardware retain some very unique and specific features: to list a few of them for example, at the hardware level, the number of functional units can be large (at least much larger than "`conventional'' processors), ROM/RAM space is critical and needs to be carefully optimised), at the application level, matching timing constraints is essential, time spent in optimising code is not an issue (at least as long as it is done automatically), etc. Therefore, techniques proven in the context of conventional processors such as software pipe lining, need to be redesigned in this context and more specifically, a specific set of tools needs to be developed for exploiting the specific capabilities of this new generation of complex, powerful embedded processor architectures.
The users groups that will have a direct benefit from the work conducted within this project will consist of industries where there is a direct need for real-time support and embedded applications, e.g. image processing or signal processing. For these user groups the outcome of the project would enable advanced processor architectures to be utilised for their high end performance needs.
The approach to be taken in this project is to combine high-level and low-level optimisations. Since this project is specifically targeted towards embedded applications, where the development time for software is an integral part of the development cycle of the whole product, and where performance of the code is critical in the success of the product, we can afford very long compilation times and hence utilise very aggressive compilation techniques.
Results from source level program analysis, such as dependence information, will be used to drive the code generation phase. Conversely, information obtained at the low-level, for example cache behaviour or (im)possibilities for register allocation, will be fed back to the high level restructurer in order to be able to choose a more profitable restructuring of the code. In general, optimisation strategies that can be parameterized by target architectural constraints will be developed. Next to the work package on management on information dissemination, the project consists of the following work packages:
- Techniques Migration;
- High-Level Restructuring, with emphasis on global transformations and strategies;
- Low-Level Restructuring, with emphasis on code scheduling;
- Integration of these tasks.
In both the high-level restructuring and low-level restructuring special emphasis will be put on the interaction between the two types of optimisation and specific tasks to meet this interaction will be allocated. Since these four work packages are highly dependent upon one another, we intend to have each partner spend two months each year at the other sites to maintain project coherence.
Fields of science (EuroSciVoc)
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques.
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques.
- natural sciencescomputer and information sciencessoftware
- engineering and technologyelectrical engineering, electronic engineering, information engineeringelectronic engineeringsignal processing
- natural sciencescomputer and information sciencescomputational science
You need to log in or register to use this function
Call for proposal
Data not availableFunding Scheme
CSC - Cost-sharing contractsCoordinator
2333CA Leiden
Netherlands