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Content archived on 2024-05-07

Optimizing compilers for embedded applications

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SALTO is a retargetable framework for developing the whole spectrum of tools that transform and analyze assembly language. SALTO operates on assembly code. This allows to add post-processor to existing compilers and to perform more complex processing than on executable codes. It provides a single environment that allows the tools needed for performance tuning on low-level codes to be implemented. This includes assembly-code schedulers (such as software pipelining), as well as profiling and tracing tools. Salto is intended to address general computing as well as embedded systems. SALTO is fully and easily retargetable with respect to the hardware details and the instruction set architecture. Any relevant part of the hardware is described in a machine description file. Resource usage may be represented for any instruction, therefore enabling data dependencies computation and resource conflict. SALTO can deal with VLIW processors as well as RISC or CISC. Machine descriptions exist for Sparc, Philips TriMedia, Texas TMSC6xxx, Alpha, etc. SALTO is intended for projects needing fast prototyping for optimisation or instrumentation at assembly code level as well as to ensure retargetability. This last capability is a major advantage when dealing with configurable hardware or multiple generations of processors (RISCs/VLIW or DSPs). SALTO can be added as a post-pass to a compiler suite to either add instrumentation code or to experiment/add new low level optimisations specific to a target architecture. SALTO can also be used standalone to relieve the programmer of tasks such as computing instruction scheduling when dealing with very finely tuned. Project URL: http://www.irisa.fr/caps/PROJECTS/Salto

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