CORDIS proporciona enlaces a los documentos públicos y las publicaciones de los proyectos de los programas marco HORIZONTE.
Los enlaces a los documentos y las publicaciones de los proyectos del Séptimo Programa Marco, así como los enlaces a algunos tipos de resultados específicos, como conjuntos de datos y «software», se obtienen dinámicamente de OpenAIRE .
Resultados aprovechables
The project involves the development of innovative new circuit designs that enable the fabrication of multiple memory types on a single semiconductor chip, using flash memory technology processes to build both flash and electrically erasable programmable read only memory (EEPROM) designs with common input/output and addressing. Memory densities is up to 8 Mbit Flash memory plus 256 Kbit EEPROM. The resulting Flash+ (tm) concept offers substantial benefits compared with the alternative two chip or software emulation solutions. It also meets the needs of most embedded microprocessor systems for both high density storage (brought by flash memories) and has the flexibility of EEPROM Memory. Applications of this concept include digital phones, set top boxes and Internet communicators, portable digital assistants and many new innovative systems.
Typical flash memories can be programmed byte-by-byte, but have to be erased in large blocks or in bulk (the whole memory). Flash memories have to be erased before they can be re-programmed. Whereas EEPROMs can be written and re-written at individual byte level. Thus EEPROM memory architectures are much more flexible for application designers who need to store byte level data without the overhead of erasing a large memory block and re-programming. The multiple memories developed are termed FLASH+ as a concept and provide up to 8 Mbit of Flash memory plus up to 256 Kbit of EEPROM. They are packaged in surface mounting TSOP40 packages
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