CORDIS proporciona enlaces a los documentos públicos y las publicaciones de los proyectos de los programas marco HORIZONTE.
Los enlaces a los documentos y las publicaciones de los proyectos del Séptimo Programa Marco, así como los enlaces a algunos tipos de resultados específicos, como conjuntos de datos y «software», se obtienen dinámicamente de OpenAIRE .
Resultados aprovechables
ALF+ is a demonstrator for the exchange of data between CAD tools needed to support the system design process. ALF+ is a C program which reads an Advanced Library Format (ALF) file, gets information from it and prevents syntax errors before generating code for other applications. The demonstrator was part of the European input on ALF to the IEEE standardisation committee.
OMILIBRES (for OMI LIBrary REpresentation Standards) objectives were to contribute to the standardisation of a library data representation for intellectual property block model information, that will be tool and vendor neutral, and to implement a prototype of this database and demonstrate the data exchange between simulation, timing analysis, floorplanning and virtually any other tool.
The partners involved belong to the three main categories of the electronic design industry: silicon foundries, EDA vendors and system houses (Nokia, Thomson CSF, Telefonica I+D, SIDSA). ECSI co-ordinated the project and the demonstrator was implemented by the University Joseph Fourier in Grenoble.
The project determined European systems houses' requirements in electronic design, to maintain their competitiveness into the next century. It also looked at the data exchange necessary to feed the design process, collect the European feedback on ALF developments, influence the world-wide standardisation with these inputs, and construct a demonstration model for the exchange of data between the tools required to support the design process.
ALF was chosen because it is a very elaborated and detailed data-book format. It provides functional, performance, timing and power modelling mechanisms that are needed for deep submicron designs. VHDL, Verilog, C models can still be used, owing to the "include" statement. Information needed by synthesis is also provided by ALF. The demonstrator is a C program which reads an ALF file, gets information from it and prevents syntax errors before generating code for other applications. Simulation is by QuickHDL from Mentor Graphics, timing analysis by MOTIVE from Viewlogic, and floorplanning by ChipPlanner from Compass. It is a small scale prototype, as it uses sample circuits which are not too complex as IP core and enables communication between ALF libraries and only 3 tools of a typical design flow.
Project URL: http://www.ecsi.org/ecsi/Projects/omilibres.html
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