Skip to main content
European Commission logo print header

Design methods for Radio Architectures GOing Nanoscale

Project description


Design of semiconductor components and electronic based miniaturised systems
DRAGON develops a design platform and novel flexible RF architectures for SoC( Systems on Chip) and SiP (Systems in Package).

The DRAGON project seeks to achieve distinct reductions in cost, size and energy consumption for multi-standard cellular handsets, and other products employing similar technology, while meeting higher demands on data rate. Increased data rates require the energy consumption per transmitted or received data bit to be reduced, both to save energy and to avoid thermal problems. When successful, wireless data services become an attractive low-cost alternative for novel applications. Always connected should be an option for everyone. With increased integration levels and with a low thermal and energy budget, both system-in-a-package and system-on-a-chip become reality and, SMEs and other non-wireless European industries will be able to develop radio-based products and services. The driving idea behind DRAGON is to research and use new design methodologies and architectural innovation based on reconfigurability and state-of-the-art digital CMOS technology in order to break the barriers imposed by the lacking scaling properties of analog components. Radio transceivers serve as an exemplary case with high impact value. In DRAGON we will develop a design platform comprising multi-standard (EDGE, WCDMA, LTE, and, 4G) transceiver specifications and novel flexible architectures as a tool to meet them. The number of required external components, like analog filters, will be reduced by the use of reconfigurable digital CMOS circuitry; and critical building-blocks will be implemented to demonstrate proof of concept, both of the architecture and design methodology, including a highly linear combined channel filter and receive ADC, RF digitisation receiver, a transmitter DAC, a switched-mode PA with adaptive digital predistortion and adaptive matching networks. All critical building-blocks will be fabricated, tested, and demonstrated in state-of-the-art CMOS technology. The project results will also be provided to standardisation bodies to allow alignment of requirements to technology limits.

The driving idea behind DRAGON is to research and use new design methodologies and architectural innovation based on reconfigurability and state-of-the-art digital CMOS technology to break the barriers imposed by the lacking scaling properties of analog components. Radio transceivers serve as an exemplary case with high impact value. With this concept we seek to achieve distinct reductions in cost, size and energy consumption for multi-standard cellular handsets, and other products employing similar technology, while meeting higher demands on data rate.Increased data rates require the energy consumption per transmitted or received data bit to be reduced, both to save energy and to avoid thermal problems. When successful, wireless data services become an attractive low-cost alternative for novel applications. Always connected should be an option for everyone. With increased integration levels and with a low thermal and energy budget, both system-in-a-package and system-on-a-chip become reality and, SMEs and other non-wireless European industries will be able to develop radio-based products and services.In DRAGON we will develop a design platform comprising multi-standard (EDGE, WCDMA, LTE, and, 4G) transceiver specifications and novel flexible architectures as a tool to meet them. The number of required external components, like analog filters, will be reduced by the use of reconfigurable digital CMOS circuitry; and critical building-blocks will be implemented to demonstrate proof of concept, both of the architecture and design methodology, including: a highly linear combined channel filter and receive ADC, RF digitisation receiver, a transmitter DAC, a switched-mode PA with adaptive digital predistortion and adaptive matching networks. All critical building-blocks will be fabricated, tested, and demonstrated in state-of-the-art CMOS technology. The project results will also be provided to standardisation bodies to allow alignment of requirements to technology limits.

Call for proposal

FP7-ICT-2009-4
See other projects for this call

æ

Coordinator

TECHNIKON FORSCHUNGS- UND PLANUNGSGESELLSCHAFT MBH
Address
Burgplatz 3a
9500 Villach
Austria

See on map

Region
Südösterreich Kärnten Klagenfurt-Villach
Activity type
Private for-profit entities (excluding Higher or Secondary Education Establishments)
Administrative Contact
Sonia Pichler
Links
EU contribution
No data

Participants (7)