Embedded Systems Design
To provide an integrated workbench that will increase productivity of embedded system development and shorten time-to-market for SoC systems
Today, SoC vendors realize that critical decisions must be made long before development teams engage in the hardware and software design for new SoC and programmable SoC-based products. It is becoming clear that hardware-software design and verification must form part of a single, unified effort, whereas the methodologies currently available were intended to aid either hardware-only or software-only development. That these tools are no longer adequate for modern SoC designs is confirmed by the recent emergence of new concepts that are disrupting the traditional design flow; these include system-level specification (specification capture), functional and architectural analysis, and high-level estimation, partitioning and software synthesis.
ENOSYS will provide an integrated workbench combining MARTE and FalconML. The OMG MARTE will be evaluated and extended to address end-user demands and requirements for integration. The approach and the tool flow will be evaluated and validated with representative scenarios from the telecoms domain. The results will be reported and presented at OMG in order to influence standardization and improve opportunities for adoption.
Fields of science
Call for proposal
See other projects for this call
Funding SchemeCP - Collaborative project (generic)
SE1 7NQ London