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Parasitic substrate coupling analysis by layout extraction

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SubstrateStorm is a suite of electronic design automation software tools enabling IC (Integrated Circuit) designers to take into account noise coupling through the substrate. Mixed-signal and radio frequency IC designers are seeing their designs failing to meet performance specifications due to noise-coupling issues. Designs are over-engineered as considerable time is spent carefully laying out the chip and adding large insulation structures, thus increasing costs. Several orders of magnitude faster than the exact (but unusable) theoretical solution of a 3-D finite elements model calculation, SubstrateStorm allows companies designing and/or manufacturing ICs to avoid costly time-to-market delays, integrate more functionality in a design, reduce over-engineering and minimise the size. Early customers include ST Microelectronics, Hitachi, Texas Instruments, Rambus, and more. SubstrateStorm brings an advanced and unique solution to an emerging problem of the micro-electronics industry. It models the substrate in 3 dimensions, providing accuracy (other approaches have failed by using 2-D models of the substrate). However, it is several orders of magnitude faster than the exact theoretical solution of a 3-D finite elements model calculation (this theoretical solution is not usable, as reported by the industry). Starting from a functional net list, from the IC layout and from a description of the technology, SubstrateStorm extracts the parasitic substrate model of the IC, completes the simulation data files, and displays the substrate noise distribution. It includes a parameterisation tool to create technology descriptions from actual fabrication process data.

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