"The training activities will cover the area of advanced CMOS with special attention on suitable gate dielectrics for high carrier mobility germanium substrates. Since strained Si, especially for nMOS, is running out of steam, high mobility channels could be an alternative option for future 11 nm node and beyond. A Ge CMOS is preferable due to processing simplicity in a Si-compatible flow, however it has remained elusive for several years due to the underperformance of nMOS transistors. During the last year, a large progress in Ge nMOSFETs has been observed which gave new momentum to this field. The key enabler for the success is the development of a good quality thick GeO2 gate dielectric which however is not scalable. In this project, we will look for alternative passivating layer/gate dielectric stacks
based on rare earth oxides which have equal or better quality when compared to GeO2 but also a better scalability to EOT values close to 1 nm fulfilling the technology requirements. Starting from La as a model material, we will extend our studies to other rare earth elements to show that rare earths modify drastically the Ge surface chemistry during oxidation and by forming stable germanates suppress interface defects and GeO volatilization maintaining high integrity dielectric/Ge interfaces. The fellowship will strengthen the already existing expertise and reputation of the host institution on Ge technology and will help the fellow to expand his knowledge and skills into an area of importance for the industry, giving him the opportunity for a career at a later stage in the semiconductor industry."
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