This project aims to increase European Integrated Circuits (IC) quality and competitiveness by developing generic test instruments and interfaces which will drasticly improve the testability and reliability of ICs.
Presently, production testing of ICs is done by large and expensive Automated Test Equipment (ATE). A disadvantage of this approach is that while the production cost of a transistor decreases with each new technology node, the cost to test these transistors remains flat or increases, especially for ICs with analogue, RF or sensors components. If test was built-in the chip and therefore part of the silicon it would ensure that the benefits of silicon scaling to new technology nodes translate to benefits in test cost. The concept of Built-In Self Test (BIST) is a well-known test solution for digital logic and memories but it is still in its infancy for analogue, RF and sensors. Although solutions do exist for these analogue, RF and sensor blocks they are typically point solutions and only applicable to that specific block. While it does reduce recurring test cost it will increase design and test development costs. Moreover it increases the time to market and risks since a new test solution has to be made
Fields of science
Call for proposal
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Funding SchemeJTI-CP-ENIAC - Joint Technology Initiatives - Collaborative Project (ENIAC)