Final Report Summary - TDRFSP (Time-Domain RF and Analog Signal Processing)
This “time-domain RF and analog signal processing” project is a continuation of a commercially successful “digital RF” research the primary investigator (PI) has started at Texas Instruments in Dallas, TX, USA. While the former industrial research was clearly directed towards solving technological challenges in mass producing inexpensive radio-frequency (RF) integrated circuits (IC) for wireless connectivity (e.g. Bluetooth) and 2G cellular handsets, it was less concerned with the underlying theory and expansion to other emerging markets. Consequently, this project revisits the time-domain operation of the fundamental RF and analog circuits and attempts to apply them into new applications, such as ultra-low power (ULP) for medical and internet-of-things (IoT), millimeter-wave (mmW) for 60GHz communications and radars, CMOS RF for cellular basestations.
The PI’s investigation into the fundamental operation of an all-digital phase-locked loop (ADPLL) has suggested that the original use of a time-to-digital converter, although technically and conceptually elegant, would leave it as a bottleneck in power consumption and phase detection linearity. This respectively prevents significant power reduction and produces so-called fractional spurs when operated at near-integer channels. The solution was to use a digital-to-time converter (DTC) to shift the reference edge such that it would be much closer to the oscillator’s edge. Consequently, a much shorter time-to-digital converter (TDC) would now be required. Application of that idea has resulted in breaking for the first time the 1mW power consumption barrier of wireless standard compliant frequency synthesizers.
Similarly, significant breakthroughs have been achieved in applying the ADPLL to generate a mmW carrier. The new 60GHz ADPLL uses digitally controlled metal strips placed underneath passive components, such as transmission lines, inductors and transformers, for frequency tuning and linear modulation. It has resulted in an FMCW radar transmitter with the record-braking linearity. Another work used a transformer-based oscillator to concurrently generate both 20GHz fundamental and its third harmonic at 60GHz. The low fundamental resonance ensures good phase noise and wide tuning range while the extraction of the 60GHz harmonic gets rid of a 60GHz frequency divider that is necessary for the feedback phase detection.
The “good old” RF oscillators were revisited from the ground up for the purpose of improving their phase noise performance by means of waveform shaping. Extensive theory has been developed, then verified by experimental prototypes. The new class-F operation results in a record-breaking figure-of-merit (normalized phase noise for a given power consumption) while the new class-F2 results in a record-breaking ultra-low phase noise that now puts the cellular basestations within the reach of CMOS. For the wireless ultra-low voltage and ultra-low power applications, the oscillator topology was transformed by replacing the conventional constant current-source transistor by two switchable, at twice the RF rate, current source transistors. This improves the power efficiency and reduces flicker noise.
The application of waveform shaping has also been applied to switched-mode power amplifiers (PA) to significantly improve efficiency at mmW frequencies and ultra-low power regime. The remaining challenge is to consolidate the novel blocks (DCO, DPA, TDC, etc) into an entire system in a uniquely synergetic way. This will demonstrate the ultimate benefits and current breakthroughs of the time-domain approach. Furthermore, an arranged collection of such a system will give rise to an antenna array that is capable of precisely controlling its beamforming in a fully digital manner.
Significant breakthroughs have been done with the digitally intensive manner of realizing wireless receivers and baseband filters, mainly via sophisticated filtering using discrete-time switched-capacitor networks and the exploitation of super-heterodyne architecture using band-pass filters.
The project's activities and progress are made public on Prof. Staszewski's website:
http://www.bogdanst.com.
The PI’s investigation into the fundamental operation of an all-digital phase-locked loop (ADPLL) has suggested that the original use of a time-to-digital converter, although technically and conceptually elegant, would leave it as a bottleneck in power consumption and phase detection linearity. This respectively prevents significant power reduction and produces so-called fractional spurs when operated at near-integer channels. The solution was to use a digital-to-time converter (DTC) to shift the reference edge such that it would be much closer to the oscillator’s edge. Consequently, a much shorter time-to-digital converter (TDC) would now be required. Application of that idea has resulted in breaking for the first time the 1mW power consumption barrier of wireless standard compliant frequency synthesizers.
Similarly, significant breakthroughs have been achieved in applying the ADPLL to generate a mmW carrier. The new 60GHz ADPLL uses digitally controlled metal strips placed underneath passive components, such as transmission lines, inductors and transformers, for frequency tuning and linear modulation. It has resulted in an FMCW radar transmitter with the record-braking linearity. Another work used a transformer-based oscillator to concurrently generate both 20GHz fundamental and its third harmonic at 60GHz. The low fundamental resonance ensures good phase noise and wide tuning range while the extraction of the 60GHz harmonic gets rid of a 60GHz frequency divider that is necessary for the feedback phase detection.
The “good old” RF oscillators were revisited from the ground up for the purpose of improving their phase noise performance by means of waveform shaping. Extensive theory has been developed, then verified by experimental prototypes. The new class-F operation results in a record-breaking figure-of-merit (normalized phase noise for a given power consumption) while the new class-F2 results in a record-breaking ultra-low phase noise that now puts the cellular basestations within the reach of CMOS. For the wireless ultra-low voltage and ultra-low power applications, the oscillator topology was transformed by replacing the conventional constant current-source transistor by two switchable, at twice the RF rate, current source transistors. This improves the power efficiency and reduces flicker noise.
The application of waveform shaping has also been applied to switched-mode power amplifiers (PA) to significantly improve efficiency at mmW frequencies and ultra-low power regime. The remaining challenge is to consolidate the novel blocks (DCO, DPA, TDC, etc) into an entire system in a uniquely synergetic way. This will demonstrate the ultimate benefits and current breakthroughs of the time-domain approach. Furthermore, an arranged collection of such a system will give rise to an antenna array that is capable of precisely controlling its beamforming in a fully digital manner.
Significant breakthroughs have been done with the digitally intensive manner of realizing wireless receivers and baseband filters, mainly via sophisticated filtering using discrete-time switched-capacitor networks and the exploitation of super-heterodyne architecture using band-pass filters.
The project's activities and progress are made public on Prof. Staszewski's website:
http://www.bogdanst.com.