Correct Hardware Design Methodology: Towards Formal Design and Verification for Provably Correct VLSI Hardware

Project Information

CHARME

Grant agreement ID: 3216

Project closed

Start date 1 July 1989

End date 29 February 1992

Funded under

• European strategic programme (EEC) for research and development in information technologies (ESPRIT), 1987-1992

Total cost

No data

EU contribution

No data

Coordinated by

INTERUNIVERSITAIR MIKROELEKTRONICA CENTRUM
Belgium

CORDIS provides links to public deliverables and publications of HORIZON projects.

Links to deliverables and publications from FP7 projects, as well as links to some specific result types such as dataset and software, are dynamically retrieved from OpenAIRE .

Publications

Other (1)

TURNING THE FORMAL VERIFICATION OF VLSI HARDWARE INTO REALITY

Author(s): CLAESEN L (KATHOLIEKE UNIVERSITEIT LEUVEN, IMEC (BE)), BORRIONEL D (INSTITUTE B.P. 53 X, LABORATOIRE IMAG-ARTEMIS, GRENOBLE (FR)), EVEKING H (TECHNISCHE UNIVERSITAET, INSTITUT FUER DATENTECHNIK, DARMSTADT (DE)), PAILLET J L (UNIVERSITE DE PROVENCE, CASE Y, MARSEILLE (FR);POLITECNICO DI TORINO (IT))
Published in: EXTRACT: ESPRIT 1991 : CONFERENCE PROCEEDINGS (1991) PP. 857-873 (EUR 13853) THE OFFICE FOR OFFICIAL PUBLICATIONS OF THE EUROPEAN COMMUNITIES, L-2985 LUXEMBOURG, 1991, Page(s) 857-873