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Side Channel Analysis Resistant Design Flow

Objetivo

The threat of side-channel attacks is of crucial importance when designing systems with cryptographic hardware or software. Especially smart cards and related micro-chip systems have shown considerable vulnerabilities in this respect. Side-channel attacks analyse and exploit the information produced by some system by, for example, measuring its power consumption or the electro-magnetic emanation of this system. From these traces the attacker can potentially make conclusions about the secret data involved in a computation inside the system.

Meanwhile, simple power analysis (SPA), differential power analysis (DPA), and their related attacks, simple and differential electro-magnetic emanation analysis (SEMA, DEMA) became known to a broader public, and thus pose the biggest threat. In the following, we will refer to these side-channel analysis methods and related attacks by using the acronym SCA. In SCARD, we propose to enhance the typical micro-chip design flow - from high level system description over register transfer layer description down to gate level net lists, and finally placement and routing of the micro chip - in order to provide a means for designing side-channel resistant circuits and systems.

Moreover, we intend to study the whole phenomenon of SCA in a consistent manner, and will also provide appropriate analysis tools and design tools for the designer of secure systems. We consider these additional ingredients of the traditional design flow of micro chips as necessary in order to enable the design of the next generation of secure and dependable devices.

Convocatoria de propuestas

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Coordinador

TECHNIKON FORSCHUNGS- UND PLANUNGSGESELLSCHAFT MBH
Aportación de la UE
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Dirección
RICHARD-WAGNER-STRASSE 7
9500 VILLACH
Austria

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Coste total
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Participantes (8)