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Exploitation of Asynchronous Circuit Technologies

Objective

The objective of EXACT is to demonstrate that asynchronous circuit techniques (ie circuits that do not use a clock) can be exploited to:

- reduce power consumption in microsystems applied to digital signal and data processing.
- specify and design high-performance I/O interface circuits between both synchronous and asynchronous VLSI subsystems.
Micropipeline and handshake circuit architectures have been compared, the possibility of blending these 2 styles investigated. Design techniques and computer aided design (CAD) tools for the automatic synthesis of asynchronous control circuits for interface applications have been developed. The following have been constructed:
Benchmark circuits to compare the various approaches to asynchronous circuit design;
a prototype compiler for asynchronous interface control circuits;
several asynchronous implementations of the 12 C input/output (I/O) expander;
a formal specification and prototype silicon for the digital compact cassette (DCC) error detector (consuming only 2.5 mW, 80% less than the synchronous integrated circuit (IC).
The specific goals of the EXACT project are to contribute to solving the energy consumption/dissipation problem in digital data and signal processing; to develop novel techniques and tools for system interfacing; to show that asynchronous circuits can be built in a disciplined way; and to demonstrate the claimed power-saving properties in a commercially relevant application.

The approach is to:

- compare the micropipeline and handshake-circuit architectures, and to investigate the possibility of blending these two styles
- develop design techniques and CAD tools for the automatic synthesis of asynchronous control circuits for interface applications (the commercial exploitation of these tools will be investigated as well)
- design and manufacture two demonstrator circuits: . an I2C I/O expander (Philips PCF 8574)
. an error detector based on DCC (Digital Compact Cassette) specifications in order to demonstrate the feasibility and low power potential of the methods.

Coordinator

NEDERLANDSE PHILIPS BEDRIJVEN BV
Address
Prof. Holstlaan, 4
5656 AA Eindhoven
Netherlands

Participants (5)

EUROPEAN DEVELOPMENT CENTER
Belgium
Address
Abdijstraat, 34
3001 Leuven
Interuniversitair Mikroelektronica Centrum
Belgium
Address
Kapeldreef 75
3030 Heverlee
South Bank University
United Kingdom
Address
Borough Road
SE1 0AA London
TECHNISCHE UNIVERSITEIT EINDHOVEN
Netherlands
Address
, 513
5600 MB Eindhoven
University of Manchester
United Kingdom
Address
Oxford Road
M13 9PL Manchester