Objetivo
Pilot line for Advanced Nonvolatile memory technologies for Automotive microControllers, High security applications and general Electronics :
The PANACHE project objective is to set-up a pilot line for embedded Flash technology design and manufacturing platform for the prototyping of innovative µcontrollers in Europe.
The current 40nm technology platform as well as the already defined 55nm technology platform will be developed and consolidated in order to build a solid manufacturing platform on these technology nodes.
The project will also extend to build the basic blocks of the technology node after 40nm; with the ambition to achieve a prototyping maturity for a new BEOL based non-volatile memory architecture suitable with the 28 nm node. To achieve this goal of generating high value added semiconductor circuits in Europe in a breakthrough leading edge technology the project will deploy all the necessary activities to bring a new technology to an early industrial maturity stage. These activities encompass such developments as: technology enhancements for various specific application requirements such as wide temperature range and reliability, high security requests, high flexibility…, design enablement allowing first time silicon success, prototyping demonstrator products in the different application areas: Automotive, Consumer/Industrial, Secure and Medical, insuring reliability of technology and designs.
Ámbito científico
Tema(s)
Convocatoria de propuestas
ENIAC-2013-2
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Régimen de financiación
JTI-CP-ENIAC - Joint Technology Initiatives - Collaborative Project (ENIAC)Coordinador
38920 Crolles
Francia
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Participantes (19)
70839 Gerlingen-Schillerhoehe
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15236 Frankfurt Oder
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75015 PARIS 15
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64289 Darmstadt
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3001 HEVERLEE
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00560 Helsinki
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150 00 PRAHA 5
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182 00 Praha 8
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38000 Grenoble
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92190 Meudon
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06100 Ankara
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44641 Kfar Saba
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92230 Gennevilliers
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08193 Cerdanyola Del Valles
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74000 Annecy
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34956 Istanbul
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41400 Kocaeli
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75794 Paris
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92120 MONTROUGE
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