The microelectronics industry has heavily invested on Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) in the past 10 years with the aim of replacing embedded FLASH memory and later address SRAM and other applications at sub-20nm technology nodes.
In this context, this ERC project MAGICAL “CMOS/Magnetoelectronic Integrated Circuits with Multifunctional Capabilities” realized groundbreaking advances in ultra-low power multifunctional systems based on hybrid CMOS/magnetic technology. With the development of portable electronics and of the Internet of Things (IOT), more and more functions must be embedded on chip: logic/memory, sensing, communication, etc. With existing technologies, the hurdles are power consumption, communication bandwidth, processing/ packaging costs. MAGICAL demonstrated that these limitations can be largely overcome through hybrid CMOS/magnetic technology.
The project followed three main goals:
- Firstly, it strengthened the STT-MRAM technology by investigating two novel ideas aiming at solving two remaining difficulties in sub-20nm STT-MRAM development: the nanostructuration of magnetic tunnel junctions at small feature size and narrow pitch and the long-term data retention, opening the path to high density (>Gbit) STT-MRAM. Within MAGICAL, a new method for nanopatterning magnetic tunnel junctions by depositing the magnetic stacks on prepatterned metallic pillars was successfully demonstrated. In addition, a new concept of MRAM relying on the use of a vertically elongated shape of the storage layer was proposed to extend the memory retention in cells of diameter down to 5nm.
-Secondly, we demonstrated that digital, analog (3D orientation sensor) and RF communication functions can be realized using technologies very similar to the one developed for STT-MRAM thus widening the spectrum of applications of this technology.
-Thirdly, through various actions, MAGICAL aimed at narrowing the cultural gap that exists between magnetism and microelectronics communities. Summer schools “Introductory Course on MRAM” were organized four times during the project as well as special events (MRAM special Poster session and MRAM Global Innovation Forums) at each IEDM conferences.
The prime benefits from this project are: ultralow power thanks to STT-MRAM non volatility and on-chip computation capability, improved communication functionalities (in particular intrachip communication), reduced processing costs.
