Towards Ubiquitous Low-power Image Processing Platforms

Project Information

TULIPP

Grant agreement ID: 688403

DOI

10.3030/688403

Project closed

EC signature date 10 November 2015

Start date 1 February 2016

End date 31 January 2019

Funded under

• INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT)

Total cost

€ 4 732 008,14

EU contribution

€ 3 897 055,45

Coordinated by

THALES
France

CORDIS provides links to public deliverables and publications of HORIZON projects.

Links to deliverables and publications from FP7 projects, as well as links to some specific result types such as dataset and software, are dynamically retrieved from OpenAIRE .

Deliverables

Documents, reports (7)

Reference platform v1

Define and describe the overall platform For this version we will focus on the interfaces between the three layers of the platform because these interfaces give the homogeneity of the platform A rough description of interfaces that might be used within each layer will also be given when available See T11 for more details

Communication, Advisory Board Plan

Description of the communication plan: explain the medias we are going to use (conventional as well as web), how we are going to use them and what kind of information and event will be communicated. Description of the Advisory Board plan: describe what the role of the Advisory Board is, how the consortium is going to set up and drive an Advisory Board which is intended to consist of industrial as well as academic experts. See T6.1 for more details.

Reference platform v3

In this version we will describe the interfaces of the components within the three layers. The interfaces to be described are the one between the hardware components, the interfaces between the OS services and libraries and the interfaces between the tool parts. See T1.3 for more details .

Reference Platform final review and standardisation recommendations

Final review report from the Advisory Board. Linked with T6.1.

Reference Platform v1 review and standardisation recommendations

First review report from the Advisory Board. Linked with T6.1.

Reference platform v2

In this version we will describe the interfaces of the components within the three layers. The interfaces to be described are the one between the hardware components, the interfaces between the OS services and libraries and the interfaces between the tool parts. In this task, the common interface that each layer will use to access its sub components will be defined. A holistic approach will be used to describe the interfaces at each layer in coherency with the one described at the other layers of the platform. See T1.2 for more details .

Communication Final Report

Description of the communication that we achieved during the project which should be the implementation of what was described in D6.3. Linked with T6.1.

Open Research Data Pilot (1)

Open Research Data Reference platform

Data associated to Refrence platform v3

Websites, patent fillings, videos etc. (1)

Dissemination, Workshop/Exhibition Final Report

Description of the dissemination that has been done during the project which should be the implementation of what was described in D6.1.

Publications

Conference proceedings (3)

"“HiFlipVX: an Open Source High-Level Synthesis FPGA Library for Image Processing"","

Author(s): L. Kalms, A. Podlubne, D. Göhringer
Published in: 2019
Publisher: 15th International Symposium on Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC)

Developing Low-Power Image Processing Applications with the TULIPP Reference Platform Instance

Author(s): T. Kalb, L. Kalms, D. Goehringer, C. Pons, A. Muddukrishna, M. Jahre et al.,
Published in: 2019
Publisher: in Kachris, C., Falsafi, B., & Soudris, D. (eds) Hardware accelerators in data centers. Cham

"""Full-HD Accelerated and Embedded Feature Detection Video Sys-tem with 63fps using ORB for FREAK"""

Author(s): L. Kalms, H. Ibrahim, D. Göhringer
Published in: 2018
Publisher: International Conference on ReConFigurable Computing and FPGAs (ReConFig)