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Wafer-scale, CMOS integration of photonics, plasmonics and electronics devices for mass manufacturing 200Gb/s non-return-to-zero (NRZ) transceivers towards low-cost Terabit connectivity in Data Centers

Periodic Reporting for period 1 - plaCMOS (Wafer-scale, CMOS integration of photonics, plasmonics and electronics devices for mass manufacturing 200Gb/s non-return-to-zero (NRZ) transceivers towards low-cost Terabit connectivity in Data Centers)

Reporting period: 2017-12-01 to 2019-05-31

The tremendous growth of photonic integration technology is paving the way for seismic ICT services and innovations which are expected to grow faster over the coming years. Mobile internet, enterprise augmented reality, cloud services and IoT drive optical network adoption as the mega data centers are poised for significant growth to support trillion-dollar app markets. This relentless growth of data traffic raise the need for ultra-high speed network transmission especially within the data centers.
plaCMOS is a European project on photonic integration technology developing innovative transceivers that will make that leap forward in terms of on-chip speed and data density. plaCMOS aims to address the skyrocketing traffic demands in inter-datacenter networks that are outpacing current technologies’ scaling trajectory. plaCMOS relies on small-proximity wafer scale integration of novel ferroelectric-based plasmonic-photonic modulators, silicon germanium photodetectors and BiCMOS electronics combined in a super-fast, micrometer-scale optical engine capable of transmitting and receiving data at world’s fastest speed of 200 Gb/s per optical channel. The project is performing multidisciplinary research extending from novel materials to plasmonic-photonic devices, high-speed electronics and transceiver modules in order to deliver a fully functional solution complying with industry standards while surpassing performance expectations. To blend these technologies into a viable transceiver platform, plaCMOS aligns its interdisciplinary approach with the end-user needs, as a means of bridging innovative research with near-market exploitation. In the same context, plaCMOS is exploring the application of its PIC platform in forward looking applications that can lead to more advanced reconfigurable transceivers. The project’s core technological objectives are listed below and converge to its strategic objective of scaling per-lane speed by eight times compared to current products, enabling single-lane 200 Gb/s.

• Advancement of thin-film ferroelectric materials for ultra-high-speed and thermally stable PICs
• Robust 200 Gb/s Ferroelectric-plasmonic modulators
• 200 Gb/s photodetectors using BiCMOS technology
• 200 Gb/s electronics using BiCMOS technology
• Wafer-scale integration of monolithic transceiver engines
• PIC advancements towards tera-class interconnections
• Extend application portfolio in fast, broadband photonic switches
During the project lifetime, the consortium has focused on two core action lines to meet its technical objectives.

1. Novel ferroelectric-materials for electro-optic modulators and non-volatile switches.
The consortium has focused its efforts on the development of a novel wafer-scale integration process flow for the plaCMOS modulator, relying on the deposition of BTO material. Deposition technology of ferroelectric BTO functional materials has been established targeting at improved quality and reliability as required by the devices. Three integration concepts have been investigated, addressing both horizontal and vertical plasmonic configurations. Preliminary fabricated structures exhibit bandwidth in excess of 70 GHz whereas directions for further improvement were identified. Photodiode designs were generated and their performance trade-offs were analysed. Modelling work was carried out on optical I/Os targeting the photonic to plasmonic coupling as well as a grating coupler interfacing a BaTiO3 waveguide. In addition, non-volatile optical switches have been investigated and progressed significantly demonstrating several electrical measurements on HZO and HO materials and characterizations of ferroelectric BTO switches.
2. Ultra-high speed BiCMOS electronics.
plaCMOS partners focused on the development of ultra-high-speed electronics for both Tx and Rx prototypes exploiting BiCMOS technology At the transmitter side the consortium’s baseline (developed in PLASMOfab project) served as a solid basis: After updating the architecture according to plaCMOS test scenario, operation was extended up to 180 Gb/s (experimentally verified). A clock doubler was also designed to enable transition to 200 Gb/s. Receiver electronics were also designed according to the plaCMOS architecture and simulations verify operation at 200 Gb/s. In order to test the high-speed capability, a back-to-back TxRx solution has been also investigated.
plaCMOS exhibited impressive progress and technology advancements beyond the state-of the art mainly in two fronts: superior ferroelectric modulators and ultra-high speed electronics. Specifically, the plaCMOS modulator leveraged the employment of ferroelectric materials that led to extended temperature operating range boosting, in this way, its reliability. Since the first demonstration of ferroelectric modulator in OFC 2017, ETHz and IBM have defined the state-of-the-art with numerous publications. More specifically, IBM developed a fabrication process achieving for the first-time homogeneous deposition of single-crystalline BTO layers on 200 mm substrates. BTO films have been deposited also for the first time on such wafer sizes. In addition, non-volatile phase shifters have been realized in silicon photonics. No other technology today has achieved such functionality. Phase-change materials is the only material system where non-volatile switching in silicon photonics has been previously reported. However, the effect is based on changes of the imaginary part of the refractive index rather the real part, which causes absorption changes. Apart from the fabrication advancement related to BTO films, IBM developed, for the first time, a CMOS compatible method to fabricate ferroelectric hafnium oxide layers using flash annealing. With this method we significantly reduce the thermal budget needed to stabilize the orthorhombic crystalline phase in hafnium zirconium dioxide.
Germanium detectors for communication are now offered on a variety of PIC platforms, however, typically with bandwidth in the range 30-50GHz. The state-of-the-art of waveguide integrated Ge-PDs in terms of responsivity and OE bandwidth is still set by IHP, with 0.9A/W and 60GHz, respectively.
In the realm of a high-speed driving electronics, plaCMOS partners developed a revolutionary (P)MUX driving circuit delivering for the first-time 180 Gb/s for NRZ-OOK signal coding, opening new avenues to the evolution of plasmo-photonic transceivers with unmatched performance. State-of-the-art results were reported at 100 Gb/s within the PLASMOFAB project which served as the baseline for plaCMOS. At a global scale, so far the fastest Si-based (P)MUXs reached 140 Gb/s.
The revolutionary technology of plaCMOS and the staggering progress witnessed are expected to allow an eight-fold increase in the speed of optical transceivers used in datacenters, delivering a disruptive technology that will fast-track optical interconnects two generations ahead.