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Wafer-scale, CMOS integration of photonics, plasmonics and electronics devices for mass manufacturing 200Gb/s non-return-to-zero (NRZ) transceivers towards low-cost Terabit connectivity in Data Centers

Periodic Reporting for period 2 - plaCMOS (Wafer-scale, CMOS integration of photonics, plasmonics and electronics devices for mass manufacturing 200Gb/s non-return-to-zero (NRZ) transceivers towards low-cost Terabit connectivity in Data Centers)

Reporting period: 2019-06-01 to 2022-02-28

The tremendous growth of photonic integration technology is paving the way for seismic ICT services and innovations which are expected to grow faster over the coming years. Mobile internet, enterprise augmented reality, cloud services and IoT drive optical network adoption as the mega data centers are poised for significant growth to support trillion-dollar app markets. This relentless growth of data traffic raise the need for ultra-high speed network transmission especially within the data centers.
plaCMOS is a European project on photonic integration technology developing innovative transceivers that will make that leap forward in terms of on-chip speed and data density. plaCMOS aims to address the skyrocketing traffic demands in inter-datacenter networks that are outpacing current technologies’ scaling trajectory. plaCMOS relies on small-proximity wafer scale integration of novel ferroelectric-based plasmonic-photonic modulators, silicon germanium photodetectors and BiCMOS electronics combined in a super-fast, micrometer-scale optical engine capable of transmitting and receiving data at world’s fastest speed of 200 Gb/s per optical channel. The project is performing multidisciplinary research extending from novel materials to plasmonic-photonic devices, high-speed electronics and transceiver modules in order to deliver a fully functional solution complying with industry standards while surpassing performance expectations. To blend these technologies into a viable transceiver platform, plaCMOS aligns its interdisciplinary approach with the end-user needs, as a means of bridging innovative research with near-market exploitation. In the same context, plaCMOS is exploring the application of its PIC platform in forward looking applications that can lead to more advanced reconfigurable transceivers. The project’s core technological objectives are listed below and converge to its strategic objective of scaling per-lane speed by eight times compared to current products, enabling single-lane 200 Gb/s.

• Advancement of thin-film ferroelectric materials for ultra-high-speed and thermally stable PICs
• Robust 200 Gb/s Ferroelectric-plasmonic modulators
• 200 Gb/s photodetectors using BiCMOS technology
• 200 Gb/s electronics using BiCMOS technology
• Wafer-scale integration of monolithic transceiver engines
• PIC advancements towards tera-class interconnections
• Extend application portfolio in fast, broadband photonic switches
During the project lifetime, the consortium has focused on six core action lines to meet its technical objectives.

1. Novel ferroelectric-materials for electro-optic modulators and non-volatile switches. Deposition technology of ferroelectric BTO functional materials has been established targeting improved quality and reliability. Three integration concepts have been investigated in the project, addressing both horizontal and vertical plasmonic configurations with BTO and organic materials. Fabricated TM BTO modulators exhibit bandwidth in excess of 150 GHz; TE BTO structures achieved a flat response until 70 GHz and TE organic modulators were measured flat up to 500 GHz.

2. World-record photodiode designs were generated achieving 3-dB bandwidths up to 265 GHz.

3. Non-volatile optical switches have been investigated and showed resistive switching and non-volatile behavior on HZO and HO materials. Ferroelectric non-volatile optical BTO switches were demonstrated with 100 states in a closed loop control scheme.

4. Ultra-high speed SiGe BiCMOS electronics. Two test chips have been developed, reaching 180 Gb/s and 200 Gb/s respectively. The test chips were tested first in individual electrical links and then in electro-optic assemblies.

5. Processes for tight integration of photonics with electronics were developed. Wafer-scale BTO bonding was demonstrated on IHP SG13G2 wafers, whereas chip-scale bonding was also confirmed to be successful. Bonding of photodiodes on SG13G2 wafers was also shown.

6. Four prototype types were developed and seven devices were manufactured in total. The plaCMOS monolithic transceiver achieved 187 Gb/s and the hybrid receiver was tested up to 100 Gb/s. The plaCMOS concept was also tested with WDM and SDM multiplexing concepts.
Plasmonic approaches have emerged as a promising path to deal with highest data rates on smallest footprints while being energy efficient. Since the first demonstration of ferroelectric modulator in OFC 2017, ETHz and IBM have defined the state-of-the-art with numerous publications, and the ferroelectric technology is currently further exploited by LUMIPHASE. Starting from IBM’s initial demonstration, LUMIPHASE developed a fabrication process achieving for the first time homogeneous deposition of single-crystalline BTO layers on 200 mm substrates. In addition, non-volatile phase shifters have been realized on silicon photonics. No other technology today has achieved such functionality. Phase-change materials is the only material system where non-volatile switching on silicon photonics has been previously reported. However, the effect is based on changes of the imaginary part of the refractive index rather the real part, which causes absorption changes. Apart from the fabrication advancement related to BTO films, IBM developed, for the first time, a CMOS compatible method to fabricate ferroelectric hafnium oxide layers using flash annealing. With this method we significantly reduce the thermal budget needed to stabilize the orthorhombic crystalline phase in hafnium zirconium dioxide.
MICRAM and UdS have worked on a power MUX (PMUX) architecture, where the final MUX selector stage directly drives the load. As the ultrashort modulator can be considered as a lumped capacitance, no far end 50-Ω termination is required. So far the fastest Si-based (P)MUXs reach 140 Gb/s. One is designed by UdS having the highest output voltage swing of 1.2V at 50 Ohm. The other is designed by R. Clarke et al. showing about 0.3V output voltage swing. Recently the fastest MUX in InP DHBT technology reached 212 Gb/s at 0.24V. At 140 Gb/s this MUX shows 0.35V output voltage swing. Within plaCMOS MICRAM and UdS developed a BiCMOS PMUX operating at 200 Gb/s and showed a full link including a 1:4 DEMUX. This is the fastest circuit demonstrated for NRZ coding.
Ge detectors for communication are now offered on a variety of PIC platforms, however, typically with bandwidth in the range 30-50GHz. The state-of-the-art of waveguide integrated Ge-PDs in terms of responsivity and OE bandwidth is still set by IHP, with 0.9A/W and 60GHz, respectively. Supported by plaCMOS, IHP could significantly improve state-of-the-art of waveguide integrated Ge photodiodes, demonstrating devices up to 265 GHz. In view of the plasmonic modulator results in plaCMOS, a unique technological setting of realizing photonics for modulators and detectors with similar size (a few 10µm in length) on a fast BiCMOS platform is now becoming a possibility. Although integration was not fully demonstrated, integrated >200GHz TRx devices will become available in the next 1-2years