Periodic Reporting for period 3 - TAPES3 (Technology Advances for Pilotline of Enhanced Semiconductors for 3nm)
Reporting period: 2020-10-01 to 2022-01-31
The overall objective of the TAPES3 project is to enable continuation of Moore’s. Focus is on exploring and preparing innovations required to bring the industry’s capability to the levels required for the 3nm CMOS node.
In lithography the aim is to develop modules of a 0.55NA (hNA) EUV system with 40% resolution improvement, a productivity of 185Wph and modular design.
In Metrology the objective is to enable the resolution and sensitivity required for metrology and process control of high aspect ratio gate all around (GAA) stacked features in 3nm CMOS devices.
In EUV mask infrastructure the aim is to assure availability of an EUV mask infrastructure capable to support lithography for the 3nm node with stable performance.
In process module exploration the objective is to find 3nm process modules demonstrating the ultimate capability of the traditional scaling and the potential of innovative solutions in patterning, design, device and integration to achieve 3nm technology figure of merit in terms of performance, power, area & cost (PPAC).
In lithography the aim is to develop modules of a 0.55NA (hNA) EUV system with 40% resolution improvement, a productivity of 185Wph and modular design.
In Metrology the objective is to enable the resolution and sensitivity required for metrology and process control of high aspect ratio gate all around (GAA) stacked features in 3nm CMOS devices.
In EUV mask infrastructure the aim is to assure availability of an EUV mask infrastructure capable to support lithography for the 3nm node with stable performance.
In process module exploration the objective is to find 3nm process modules demonstrating the ultimate capability of the traditional scaling and the potential of innovative solutions in patterning, design, device and integration to achieve 3nm technology figure of merit in terms of performance, power, area & cost (PPAC).
In Lithography the first ever parts of the hNA scanner were completed and the sensor systems matched 3nm node requirements by ASML. Zeiss SMT has delivered modules and systems of the 0.55NA EUV projection optics, i.e. the mirror modules, a mechanical representative of the POB, as well as the prototype of the POB itself. DEMCON integrated and qualified the hNA wafer stage positioning module qualification tool. IMS Chips manufactured prototype Diffractive Optical Elements (DOEs) for mirror measurements. Fraunhofer IISB tested and applied models for polychromatic effects in hNA EUV imaging. Fraunhofer IWS upscaled the polishing process and ion beam smoothing to ø ~300 mm EUV mirrors. VDL realized modules for the wafer handler systems (Figure 1).
In Metrology the partners focused on 3nm technology node metrology tools and hybrid methodologies. AMIL qualified its new Critical Dimension Scan Electron Microscope with advanced e-beam tilt and presented a hybrid CD-SEM - EDX method to extract height and SiGe concentration of underlayers of a nanosheet device using imec’s montblanc test vehicles (Figure 2). Nova qualified the new OCD interferometric channel and significantly improved the correlation of its results to a TEM reference on imec’s montblanc test wafers. FEI has completed development of an advanced new generation TEM platform, which includes novel CFEG electron source, “S-Corr” electron optical corrector, NG STEM detector unit “Panther”, and pixelated 4D electron detector “EMPAD”) and qualified it with imec’s imec ATLAS platform SuperVIA (Figure 3). KTI has completed development of overlay target design modules which enabled selection of on-product overlay targets for the 3nm technology node using imec’s LAMBIC test vehicle wafers.
In the development of EUV mask infrastructure, absorber material selection is key. Aspects covered are imaging performance, material deposition & composition, analysis & measurement of optical properties, etch-ability, repairability and cleanability. These were documented for a selected set of promising materials, based on experimental assessment and guidance on imaging performance by simulation. Second is reticle life time, with in-situ XPS the impact of storage was studied. For both topics, actinic (EUV) – and X-ray metrology have been instrumental. Further achievements are: preparation of anamorphic and isomorphic mix-and-match imaging and overlay tuning to reduce scanner-non-correctable overlay errors, realization of focused e-beam induced deposition technology for repair of phase shift masks and demonstration of resolution improvement in actinic patterned mask inspection based on lensless imaging.
Regarding process and module solutions for 3nm node, advances in the 3rd period include: finalisation of design rules, demonstration of eSALELE patterning at 21nm pitch (Figure 4), computational lithography solutions for hNA lithography. FEOL module development yielded: low-k gate spacer integration, contact resistivity reduction via in-situ doped S/D and heavy metal silicides, innovative gap fill solutions, further reduction of Treading Defect Dislocations for SiGe strain relaxed buffers, damage free rinsing/drying processes for high aspect ratio structures. Regarding module build for MOL, demonstrate low resistive, void free Ru-based metallization for contacts. For 3nm node BEOL, hybrid metallization: electrical results for Ru-Ru-Cu metallization, proof of concept for Cu-Ru-Cu and Cu-W-Cu hybrid metallization. Electrical results for Thin Film Transistors in BEOL, electrical results for Super Via scaling booster (Figure 5).
In Metrology the partners focused on 3nm technology node metrology tools and hybrid methodologies. AMIL qualified its new Critical Dimension Scan Electron Microscope with advanced e-beam tilt and presented a hybrid CD-SEM - EDX method to extract height and SiGe concentration of underlayers of a nanosheet device using imec’s montblanc test vehicles (Figure 2). Nova qualified the new OCD interferometric channel and significantly improved the correlation of its results to a TEM reference on imec’s montblanc test wafers. FEI has completed development of an advanced new generation TEM platform, which includes novel CFEG electron source, “S-Corr” electron optical corrector, NG STEM detector unit “Panther”, and pixelated 4D electron detector “EMPAD”) and qualified it with imec’s imec ATLAS platform SuperVIA (Figure 3). KTI has completed development of overlay target design modules which enabled selection of on-product overlay targets for the 3nm technology node using imec’s LAMBIC test vehicle wafers.
In the development of EUV mask infrastructure, absorber material selection is key. Aspects covered are imaging performance, material deposition & composition, analysis & measurement of optical properties, etch-ability, repairability and cleanability. These were documented for a selected set of promising materials, based on experimental assessment and guidance on imaging performance by simulation. Second is reticle life time, with in-situ XPS the impact of storage was studied. For both topics, actinic (EUV) – and X-ray metrology have been instrumental. Further achievements are: preparation of anamorphic and isomorphic mix-and-match imaging and overlay tuning to reduce scanner-non-correctable overlay errors, realization of focused e-beam induced deposition technology for repair of phase shift masks and demonstration of resolution improvement in actinic patterned mask inspection based on lensless imaging.
Regarding process and module solutions for 3nm node, advances in the 3rd period include: finalisation of design rules, demonstration of eSALELE patterning at 21nm pitch (Figure 4), computational lithography solutions for hNA lithography. FEOL module development yielded: low-k gate spacer integration, contact resistivity reduction via in-situ doped S/D and heavy metal silicides, innovative gap fill solutions, further reduction of Treading Defect Dislocations for SiGe strain relaxed buffers, damage free rinsing/drying processes for high aspect ratio structures. Regarding module build for MOL, demonstrate low resistive, void free Ru-based metallization for contacts. For 3nm node BEOL, hybrid metallization: electrical results for Ru-Ru-Cu metallization, proof of concept for Cu-Ru-Cu and Cu-W-Cu hybrid metallization. Electrical results for Thin Film Transistors in BEOL, electrical results for Super Via scaling booster (Figure 5).
All developments in this project are geared to move the capability of the semiconductor industry beyond the present state of the art.
In Lithography it is the migration to hNA EUV, introduction of novel imaging sensors and new wafer stage. The associated positioning module and its qualification tool from DEMCON are one of a kind. The hNA POB and its submodules exceed the state of the art by 2x in size, 2x in accuracy and complexity of the mirror surface. Also the DOEs for the hNA optics have much tighter specifications.
To model 3-dimensional mask effects, analyze polychromatic effects and identify critical performance drivers Fraunhofer IISB is extending its imaging and lithography modeling simulator. New polishing techniques in which Ion beam smoothing using energetic ion bombardment of the surface to be polished is studied by Fraunhofer IWS.
For the new vacuum pre-aligner module for the wafer-handler developed by VDL-ETG active contamination control beyond the current state of the art is needed.
In metrology, AMIL is developing next generation tools for measuring critical dimensions and new capabilities for high resolution analysis of device structures topologies. NOVA works on adding a unique channel of information to its current generation OCD tool to extract new type of information through the use of temporal changes in the spectra.
FEI develops a new generation Scanning Transmission Electron Microscopy (STEM) tool capable of reference metrology for ultra-thin and beam-sensitive layers in a near-line industrial environment. KLA is automating the OVL (overlay) methodology for the assessment of ‘on product overlay’ and improve the overall measurements accuracy.
In EUV mask infrastructure, a main technological progress is the demonstrated opportunity to optimize the applied mask absorber type per pattern type. This yet comes with a potential pitfall that it may cause too many options to be supported by the mask supply chain, to be overcome with an industry consensus on supported options. Adding phase correction as part of the repair strategy for EUV-specific mask blank defects is expected to lead to an important yield - and capability improvement. The proof of principle for lens-less actinic imaging for defect inspection is also one of the innovative developments.
Regarding the process options assessment for 3nm technology, progresses beyond the state of the art include: development of computational lithography for hNA lithography, process solutions for module build for integrated GAA NS device, hybrid metallization solutions for BEOL, demonstration of Super Via scaling booster for resolving BEOL congestion and logic cell are reduction, integration of N2-purge option for FOUP for contamination control and defect reduction.
In Lithography it is the migration to hNA EUV, introduction of novel imaging sensors and new wafer stage. The associated positioning module and its qualification tool from DEMCON are one of a kind. The hNA POB and its submodules exceed the state of the art by 2x in size, 2x in accuracy and complexity of the mirror surface. Also the DOEs for the hNA optics have much tighter specifications.
To model 3-dimensional mask effects, analyze polychromatic effects and identify critical performance drivers Fraunhofer IISB is extending its imaging and lithography modeling simulator. New polishing techniques in which Ion beam smoothing using energetic ion bombardment of the surface to be polished is studied by Fraunhofer IWS.
For the new vacuum pre-aligner module for the wafer-handler developed by VDL-ETG active contamination control beyond the current state of the art is needed.
In metrology, AMIL is developing next generation tools for measuring critical dimensions and new capabilities for high resolution analysis of device structures topologies. NOVA works on adding a unique channel of information to its current generation OCD tool to extract new type of information through the use of temporal changes in the spectra.
FEI develops a new generation Scanning Transmission Electron Microscopy (STEM) tool capable of reference metrology for ultra-thin and beam-sensitive layers in a near-line industrial environment. KLA is automating the OVL (overlay) methodology for the assessment of ‘on product overlay’ and improve the overall measurements accuracy.
In EUV mask infrastructure, a main technological progress is the demonstrated opportunity to optimize the applied mask absorber type per pattern type. This yet comes with a potential pitfall that it may cause too many options to be supported by the mask supply chain, to be overcome with an industry consensus on supported options. Adding phase correction as part of the repair strategy for EUV-specific mask blank defects is expected to lead to an important yield - and capability improvement. The proof of principle for lens-less actinic imaging for defect inspection is also one of the innovative developments.
Regarding the process options assessment for 3nm technology, progresses beyond the state of the art include: development of computational lithography for hNA lithography, process solutions for module build for integrated GAA NS device, hybrid metallization solutions for BEOL, demonstration of Super Via scaling booster for resolving BEOL congestion and logic cell are reduction, integration of N2-purge option for FOUP for contamination control and defect reduction.