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Technology Advances for Pilotline of Enhanced Semiconductors for 3nm

Periodic Reporting for period 2 - TAPES3 (Technology Advances for Pilotline of Enhanced Semiconductors for 3nm)

Reporting period: 2019-10-01 to 2020-09-30

The overall objective of the TAPES3 project is to enable continuation of Moore’s. Focus is on exploring and preparing innovations required to bring the industry’s capability in lithography, metrology, mask infrastructure and process modules to the levels required for the 3nm CMOS node.
In lithography the aim is to develop modules of a hyper NA (hNA) EUV systems with 40% resolution improvement, a productivity of 185Wph and modular design.
In Metrology the objective is to enable the resolution and sensitivity required for metrology and process control of high aspect ratio gate all around (GAA) stacked features in 3nm CMOS devices.
In EUV mask infrastructure the aim is to assure availability of an EUV mask infrastructure capable to support lithography for the 3nm node with stable performance.
In process module exploration the objective is to find 3nm process modules demonstrating the ultimate capability of the traditional scaling and the potential of innovative solutions in patterning, design, device and integration to achieve 3nm technology figure of merit in terms of performance, power, area & cost (PPAC).
In Lithography the system design of the hNA scanner was completed and first results of sensor systems became available. Zeiss installed the equipment for integration and metrology of the mirror modules for the Projection Optical Box (POB) and progressed on realization of the mirror bodies and frames. DEMCON defined the design for the hNA positioning module qualification tool. IMS Chips progressed on creating Diffractive Optical Elements (DOEs) for measuring the mirrors. Fraunhofer IISB tested and applied models for polychromatic effects in hNA EUV imaging. Fraunhofer IWS performed polishing experiments on optical materials with a dual ion beam. VDL started the design for the wafer handler systems and vacuum pre-aligner module and realized test setups to analyze and control contamination effects.

In Metrology the partners focused on 3nm technology node metrology tools and hybrid methodologies. AMIL continued with the development of the new Critical Dimension Scan Electron Microscope, see Figure 1, with a high-resolution column prototype and achieved up to 35% improvement in resolution so far. Nova selected their next generation Optical Critical Dimension OCD tool’s channel of information and improved its signal to noise by improving the active vibration control by factor of 2 . FEI continued with the New pixelated (4D) electron detector and next generation TEM prototype with automated application software. KTI continued with the development of optical 3nm overlay target design simulation and calibration software to improve overall accuracy .

Part of EUV mask infrastructure development is about absorber materials. Aspects covered are imaging performance, material deposition & composition, optical properties, etch-ability, repairability and cleanability. Fraunhofer IISB simulation work on showed that both high extinction coefficient materials and low refractive index materials have advantages depending on the intended pattern types to be imaged. To prepare anamorphic and isomorphic mix-and-match imaging, overlay tuning of EUV reticles on Zeiss’ Fortune tool is underway. Reticle life time results obtained by TNO and imec revealed a reticle storage effect. PTB contributes to this study with EUV – and X-ray metrology. PSI demonstrated resolution improvements for actinic inspection. Zeiss is working on concepts of phase repair of Multi Level defects on MeRIT, Other contributors to the progress on EUV mask infrastructure are AMTC, IMS, Oxford Instruments, Optixfab, RWTH and SÜSS.

Regarding process and module options assessment for the 3nm node, major advances in the 2nd year included: cost evaluation of different EUV use scenarios, set up of computational lithography for assessment of hNA resolution limits and novel mask absorbers. FEOL module development yielded: morphological demonstration of a CFET device (Figure 2), record low threading defects density for strain relaxed buffers, technology for Ga-based plasma doping for low resistive contacts. Regarding high aspect ratio device architectures, progress on gap fill and test vehicle development for defect quantification during wet clean and drying. For 3nm node BEOL, benchmark of hybrid metallization solutions including electrical validation (Figure 3), module development for integration of the Super Via scaling booster for logic cell track height reduction and resolving interconnect congestion.
In Lithography it is the migration from 0.33 to 0.55 NA, introduction of local wafer cooling, novel imaging sensors with a 10x performance improvement and new wafer stage with 2x acceleration. The associated positioning module and its qualification tool from DEMCON are one of a kind. The hNA POB and its submodules exceed the state of the art by 2x in size, 2x in accuracy and complexity of the mirror surface. Also the DOEs for the hNA optics have much tighter specifications.
To model 3-dimensional mask effects, analyze polychromatic effects and identify critical performance drivers Fraunhofer IISB is extending its imaging and lithography modeling simulator. New polishing techniques in which Ion beam smoothing using energetic ion bombardment of the surface to be polished is studied by Fraunhofer IWS.
For the new vacuum pre-aligner module for the wafer-handler being developed by VDL-ETG active contamination control beyond the current state of the art is needed.

In metrology, AMIL is developing next generation tools for measuring critical dimensions and new capabilities for high resolution analysis of device structures topologies. NOVA works on adding a unique channel of information to its current generation OCD tool to extract new type of information through the use of temporal changes in the spectra.
FEI develops a new generation Scanning Transmission Electron Microscopy (STEM) tool capable of reference metrology for ultra-thin and beam-sensitive layers in a near-line industrial environment. KLA is automating the OVL (overlay) methodology for the assessment of ‘on product overlay’ and improve the overall measurements accuracy.

In EUV mask infrastructure, a main technological progress is the demonstrated opportunity to optimize the applied mask absorber type per pattern type. This yet comes with a potential pitfall that it may cause too many options to be supported by the mask supply chain, to be overcome with an industry consensus on supported options. Adding phase correction as part of the repair strategy for EUV-specific mask blank defects is expected to lead to an important yield - and capability improvement. The proof of principle for lens-less actinic imaging for defect inspection is also one of the innovative developments.

Regarding the process options assessment for 3nm technology, progresses beyond the state of the art include: development of computational lithography for hNA lithography, module built for integrated CFET device architecture, record low treading density defects for strain relaxed buffers, hybrid metallization solutions for BEOL, demonstration of Super Via scaling booster for resolving BEOL congestion and logic cell are reduction, integration of N2-purge option for FOUP and stocker for contamination control and defect reduction.
Figure 2: Complementary FET (CFET) device integration
Figure 3: Electrical assessment metallization options for 3nm BEOL.
Figure 1: SEM Tilt development in TAPES3.