Objective
Ideally, advances in hardware design would directly translate to performance or energy improvements in software. In reality, this involves a manual process of tuning a sophisticated production compiler or hardware-specific rewriting of code. This process is challenging even for the few experts who possess the required range of skills. Moreover, any errors introduced in this process affect the entire software stack and likely compromise its reliability and security.
The aim of this project is to enable software to take full advantage of the capabilities of emerging microprocessor designs without modifying the compiler.
Towards this end, we propose a new approach to code generation and optimization. Our approach uses constraint solving in a novel way to generate efficient code for modern architectures and guarantee that the generated code correctly implements the source code.
Unlike existing superoptimization and synthesis methods, our approach shifts the entire search problem into the solver. Tight integration with the solver provides a way to reuse reasoning steps and guide the solver using domain specific
information about the input program and the target architecture.
This approach paves the way to employing recent advances in SMT solvers and has the potential to advance SMT solvers
further by providing a new category of challenging benchmarks that come from an industrial application domain.
I expect this project to revolutionize the way compilers perform hardware-specific optimizations. It will eliminate an entire class of software errors and unrealized potential performance gains caused by modern optimizing compilers. It will also aid hardware designers by providing greater flexibility for design explorations and faster deployment of new hardware. Thus, this project will lead to significant improvement in performance and stability of software systems, as well as a fundamental impact on several scientific fields.
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Funding Scheme
ERC-STG - Starting GrantHost institution
E1 4NS London
United Kingdom