Skip to main content

3D integration technology for silicon spin qubits

Periodic Reporting for period 1 - QUCUBE (3D integration technology for silicon spin qubits)

Reporting period: 2019-02-01 to 2020-07-31

Originally conceived to describe the microscopic world of atoms and elementary particles, the theory of quantum mechanics has eventually served to predict macroscopic phenomena, e.g. the electrical and optical properties of semiconductors, resulting in a wide range of technological applications that have changed our way of living. Foundational properties like quantum superposition and entanglement, however, have remained essentially unexploited. Their use may allow achieving computational powers inaccessible to classical digital computers, opening unprecedented opportunities. In a quantum computer, the elementary bits of information are encoded onto two-level quantum systems called qubits. Since qubits interact with the uncontrolled degrees of freedom of their environment, the evolution of their quantum states can become quickly unpredictable, leading to a reduced qubit fidelity. In topological quantum computing schemes, e.g. the surface code, the reduced fidelity is compensated by using decoherence-free logical qubits consisting of a large number (at least thousands) of entangled physical qubits. As a result, a useful quantum processor should host millions of qubits. Although dauntingly large, this number is still small as compared to the number of transistors in a modern silicon microprocessor.
QuCube leverages industrial-level silicon technology to realize a quantum processor containing hundreds of spin qubits confined to a two-dimensional array of electrostatically defined silicon quantum dots. To face the challenge of addressing the qubits individually, we use a three-dimensional architecture purposely designed to accommodate, on separated planes, the charge sensing devices necessary for qubit readout, and the metal gate lines for the electrical control and measurement. The gate lines are operated according to a multiplexing principle, enabling a scalable wiring layout. We aim at implementing fault-tolerant logical qubits and performing quantum simulations of complex Hamiltonians.
The first period has been devoted to the consolidation of our trans-institutional research team, including the recruitment of PhD students and post-docs. Overall, the team gathers today around 40 people. Work has been structured in four operational work-packages (WPs). At the level of device design and fabrication (WP1), we have proceeded along two parallel axes. On the one hand, we have pursued the development of linear arrays of spin qubits leveraging an already established transistor technology. (The purpose of this action is to provide a short-path access to fully functional, small-scale quantum registers to be used as test bench for the development and optimization of control and readout tools.) On the other hand, we have started to work on the development of two-dimensional qubit arrays, which are the envisioned pathway to large-scale integration. In particular, we have performed numerical simulations to evaluate the robustness and the tunability of possible alternative solutions to various variability factors such as interface roughness and charge disorder. With respect to the demonstration of basic quantum functionalities (WP2), efforts have mostly focused on the development of readout tools based on rf gate reflectometry, with significant progress toward our goal of high-fidelity, single-shot readout in 1us. Finally, a variety of actions have been taken to address signal management in the control of large qubit arrays (WP3). Among these, some first demonstrations of cryo-CMOS electronics and some initial developments of cryogenic packaging solutions.
Silicon spin qubits can potentially leverage the large-scale integration capabilities of silicon technology. So far, experimental demonstrations have involved only up to a few coupled qubits, which were used to demonstrate elementary quantum operations. QuCube aims at addressing the scalability of silicon spin qubits in order take them to a pre-industrial maturity level. Our ultimate objective is to fabricate an operational quantum processor consisting of a two-dimensional array with at least one hundred spin qubits coupled through tunable, nearest- neighbor exchange interactions. We shall explore the possibility to obtain a logical qubit with extended quantum coherence and evaluate possible roadblocks and solutions for large-scale integration.