Descripción del proyecto
Nueva herramienta para detectar la diafonía electromagnética
El diseño de chips semiconductores es cada vez más complejo. Tendencias tecnológicas como la inteligencia artificial y la computación en la nube, por ejemplo, requieren un mayor uso de las frecuencias de señal en chip más allá de los 2 GHz. Sin embargo, estos diseños cada vez más complejos provocan diafonía electromagnética, es decir, interferencias no deseadas causadas por los campos eléctricos y magnéticos de una señal sobre otra. Si no se soluciona, la diafonía puede llegar a costar miles de millones de euros a los fabricantes de chips. En la actualidad, no se dispone de herramientas para detectar la diafonía durante las primeras etapas. En este contexto, el equipo del proyecto financiado con fondos europeos CRAM comercializará una herramienta automatizada de análisis de la diafonía, que ayudará a los fabricantes de chips a abordar el análisis de la diafonía antes de que se convierta en un problema.
Objetivo
Helic produces Electronic Design Automation (EDA) tools, and specifically Electromagnetic Modelling (EM) software for Integrated Circuit (IC) Design. The tools are used to produce realistic models of ICs, to simulate operation under realistic conditions, thus generating savings both by reducing the number of IC prototyping and measurement cycles, as well as by significantly shortening Time to Market.
The Company aims to become a world leader in a literally new market segment opening up in the EDA sector for Automated Crosstalk Analysis. The market is driven by high-value and high-growth applications in the 5G Networks, Cloud, IoT and Automotive sectors.
Recent System on Chip design trends with requirements for high levels of chip density and integration, high RF frequency, Gbps bit rates and low power consumption, are establishing Crosstalk noise both as a major design constraint as well as a horrifying uncertainty for delayed Time to Market and subsequent revenue generation.
Helic is in a unique position to create a game-changing Automated Crosstalk Analysis tool, which will (a) allow IC designers to abandon expensive and limiting risk-averse design practices and (b) eliminate the risk of missing the Market window of opportunity due to extended IC prototyping-debugging cycles, with potential financial penalty of up to $0.5bn for an advanced SoC.
Although Helic tools contain all the necessary underlying, patented technology to tackle the problem of Crosstalk Analysis, significant product development effort is required to deliver a new Automated Crosstalk Analysis tool.
The proposed feasibility study will address both the required product development effort and associated risk, as well as end-user functional requirements and market needs via an extended market survey with existing and prospect customers. The project will deliver a business plan including fully resourced product development roadmap, operational capacity and financial planning and risk assessment.
Ámbito científico
- natural sciencescomputer and information sciencesartificial intelligence
- engineering and technologyelectrical engineering, electronic engineering, information engineeringinformation engineeringtelecommunicationstelecommunications networksmobile network5G
- social sciencessociologyindustrial relationsautomation
- engineering and technologymechanical engineeringvehicle engineeringautomotive engineering
- natural scienceschemical sciencesinorganic chemistrymetalloids
Programa(s)
Convocatoria de propuestas
Consulte otros proyectos de esta convocatoriaConvocatoria de subcontratación
H2020-SMEInst-2018-2020-1
Régimen de financiación
SME-1 - SME instrument phase 1Coordinador
D18 NW62 SANDYFORD DUBLIN
Irlanda
Organización definida por ella misma como pequeña y mediana empresa (pyme) en el momento de la firma del acuerdo de subvención.