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Research for GaN technologies, devices, packages and applications to address the challenges of the future GaN roadmap

Periodic Reporting for period 1 - UltimateGaN (Research for GaN technologies, devices, packages and applications to address the challenges of the future GaN roadmap)

Reporting period: 2019-05-01 to 2020-04-30

Digitalisation and the underlying key technologies are an essential part of the answers to many of the daunting challenges that societies are facing today. The core enablers for this digital transformation are Electronic Components and Systems (ECS) used in applications, information highways and data centres which are the “backbone” of the entire digitalisation (5G). Electrical energy is the essential resource powering them. Due to the steadily increasing demand for data traffic, -storage and -processing, higher energy efficiency is inevitable. This is also true for energy conversion in terms of Smart Grids and Smart Mobility.

Whenever Silicon based semiconductor devices reach their limits, Gallium Nitride (GaN) based power semiconductors are promising candidates. Several projects have proven these assumptions and serve as the basis for the availability of the first generation of European GaN-devices. However, these projects also made clearly evident that the challenges of the GaN technologies have been heavily underestimated what clearly results in the necessity to further investigate GaN and focus the research activities on size reduction, cost effectiveness and reliability while dealing with severe challenges in terms of electric fields, current densities and power densities.

These challenges hamper shrinking of GaN devices which is necessary to improve their affordability and thus increase the range of potential applications. UltimateGaN will overcome the red brick wall and focus on the next generation GaN technology particularly addressing six major objectives along and across the entire vertical value chain of power and radio frequency (RF) electronics:
• Research on vertical power GaN processes and devices pushing performance beyond current state-of-the-art
• Research on lateral GaN technologies and devices to achieve best in class power density and efficiency while optimizing cost vs. performance
• Bringing GaN on Silicon RF performance close to GaN on Silicon Carbide thus enabling an affordable 5G rollout
• Breaking the packaging limits – size, electrical and thermal constraints - for high performance GaN power products
• Close the reliability and defect density gap for most innovative GaN devices
• Demonstrate European leadership in high performance power electronics and RF application domains
The first three objectives are GaN technology related while the fourth objective will address the fact that the outstanding semiconductor performance of GaN can only be harvested when assembly/packaging, interconnections and enhanced thermal management are optimized in a holistic approach. Crystal defect formation, especially at the GaN on Si-interface, is one of the major obstacles toward yield and reliability levels of competing Si based technologies. Thus, another main objective addressed by UltimateGaN is to prevent these defects in the next generation GaN on Si devices.
The research results coming from the technology and packaging objectives will be used and demonstrated in the course of the last objective dealing with demanding fields of 5G-, smart mobility- and smart grid applications for these high performance devices.

The project UltimateGaN will enable highest efficiencies in the chosen applications and will lead to a significant reduction of the CO2 footprint of digitalisation, smart grids and smart mobility. To strengthen Europe’s role in the future of GaN business, significant effort must be spent to achieve affordable next generation GaN on Si transistors. As US and Asian companies are also heavily investing in this direction, it is of highest importance for Europe to speed up progress towards the next technology generations.
WP1
- For the semi-vertical GaN MOSFETs on 200 mm diameter substrates: 5 mΩ·cm2 of on-state resistance of a semi-vertical device on GaN-on-Si
- For vertical GaN devices on 2-inch substrates: HVPE layer growths with a total stack thickness of about 20µm on GaN/Sapphire templates
- For GaN-on-Si substrates based on coalesced nanowire technology: New process for rapid fabrication of nanowire growth substrates established with significantly increased wafer throughput
WP2
- 200mm GaN-on-Si epitaxy wafers with good blocking voltage and trapping performance
- Buffer-free Quanfine® GaN-on-SiC epitaxy showing superior performance in the benchmark
- Normally-off tri-gate devices realized with threshold voltage close to 2V
WP3
- Identified device and epi parameters to achieve high gain and fT>50GHz
- Developed silicon substrates and epi with lower transmission line losses
- First transistor measurements with scalable FP concept demonstrating high gain
WP4
- Low parasitic power package concepts
- RF embedding concept and simulation for sub 6 GHz PA
- System in package approaches for laser driver in LiDAR application
WP5
- Analysis of energetically favorable segregation of Mg; calculation of phase diagrams of charge neutral Mg and C substitutionals
- Analysis of the current collapse and dynamic-Ron on first generation of RF HEMTs; dominant trapping mechanism identified
- Two promising methods for measuring the virtual junction temperature during power cycling identified and implemented
WP6
Concept and initial design of UltimateGaN demonstrators, e.g.
- 1 kW low cost / IP65 2kW/48Vdc for telecom and datacenter application
- Doherty PA based on first available bare die GaN devices for RF frontends
- DC/DC converter and the multichannel GaN driver for the LIDAR application
The expected technical innovation of UltimateGaN is reflected in the project goals:
• Reduce die size for next generation 600V pGaN norm-off lateral GaN power HEMT by > 50%.
• Leverage cost down potential for RF-GaN on Si devices by a factor of 5-10 compared to state-of-the-art GaN on SiC prices.
• Footprint reduction of > 30% of packaged GaN-devices to enable smaller form factors in high power applications.
• Reduction by up to 50% of losses on main devices and increase by 50% of the power density compared to current state-of-the-art of 1st generation GaN based systems.
• The quality targets set in this project will ensure non-restricted use of the GaN power devices in all industrial and consumer applications, despite the drastically reduced chip sizes, which come along with additional reliability challenges to be solved.

The project is designed to provide solutions for some of the major societal challenges in the fields of digitalisation, energy efficiency and mobility of the future. The early availability of affordable, reliable GaN semiconductors will heavily impact:
• Digitalisation in Europe and worldwide through opportunities created by ultra-high speed 5G communication that are directly depending on the affordable excellent performance of GaN devices to enable a broad variety of applications.
• Efficient usage of energy by providing high performance GaN components for data centers and power converters in applications like telecommunication and photovoltaic.
• Future mobility scenarios enabling electrification of vehicles by innovative battery charging concepts realized with GaN. Novel driving scenarios with emphasizing the steps necessary to reach the next level in autonomous driving through ultra-fast switching sensor applications (LIDAR, RADAR) with GaN based sensor systems.
AFM results-regrown ohmic profiles
Overview of SSGaN maskset for semi-vertical devices on GaN-on-Si and poly-AlN (left) and Vertical Ga
Next generation 1kW rectifier for telecom and data centers using GaN and planar magnetics in the PFC
UltimateGaN project logo
Phase diagram of Mg (left) and C (right) at m plane GaN surfaces as function of the N and Mg and C c
100mm GaN-on-SiC Quanfine wafer with HEMT devices and test strcuctures processed for benchmarking st
LIDAR laser driver in a flipchip on laminate solution