Periodic Reporting for period 1 - SiTe (Silicon Technology for Novel Semiconductor-Superconductor Hybrid Qubits)
Reporting period: 2020-04-01 to 2022-03-31
The quantum information revolution aims at transforming information technology by engineering quantum systems, i.e. qubits, that can be used for quantum information processing allowing to perform computations currently intractable for classical computers. In the quest for such systems, solid-state qubits alongside trapped ions currently are the leading candidates. One of the most advanced solid-state technologies to date is based on superconducting quantum circuits, which makes use of Josephson tunnel junctions and their macroscopic quantum coherence between two superconducting islands. Due to recent advances in semiconductor-superconductor hybrid devices, novel semiconductor-superconductor-based qubit architectures have emerged, demonstrating improved properties compared to conventional superconducting quantum circuits, such as in-situ tunability while not being susceptible to magnetic noise. These novel hybrid qubits make use of the true microscopic particle transport within semiconductor-superconductor weak links. The main goal of the project is to unambiguously demonstrate SSH-based qubits as a viable and scalable platform for QIP by combining novel superconducting quantum circuits with advanced silicon-technology. Most of the current implementations of semiconductor-superconductor hybrid devices are based on semiconductor materials that are incompatible with current CMOS fabrication technology. Hence, the objectives of the project “Silicon Technology for Novel Semiconductor-Superconductor Hybrid Qubits” (SiTe) were to develop and characterize semiconductor-superconductor hybrid weak links solely based on silicon (Si), which have the advantage of being fully CMOS compatible and consisting entirely of crystalline materials. A further objective was to implement these Si-based weak links in novel superconducting quantum circuits, which will combine the good controllability of superconducting quantum circuits with the unique material quality of Si. Developing and implementing such devices will be a decisive landmark towards building larger quantum circuits, which will be a crucial step towards a vital roadmap for their application in quantum information processing.
The work carried out within the SiTe project concluded that through further material improvements it should be possible to reproducibly fabricate semiconductor-superconductor hybrid weak links based purely on silicon, utilizing metal-silicide technology. However, integrating such devices in larger superconducting quantum circuits requires additional material characterization in order to enhance the induced superconductivity in the silicon channel.
The work carried out within the SiTe project concluded that through further material improvements it should be possible to reproducibly fabricate semiconductor-superconductor hybrid weak links based purely on silicon, utilizing metal-silicide technology. However, integrating such devices in larger superconducting quantum circuits requires additional material characterization in order to enhance the induced superconductivity in the silicon channel.
Over the course of the project period (24 months) work was performed on multiple aspects of the project, specifically material characterization, device fabrication and characterization. In terms of material characterization different metal-silicides as well as superconducting materials have been studied with regards to their crystallographic growth and their corresponding material properties such as critical temperature and resistivity. Two different superconducting material stacks have been identified to exhibit a well-controlled growth mechanism as well as giving a good contact to an intrinsic silicon channel for positive or negative charge carriers respectively. Following, a lot of work has been put into developing a reproducible fabrication platform for silicon transistor devices incorporating these materials. This included especially work towards understanding electrical leakage problems between the contact and the gate of the transistor and developing mitigation strategies. Additionally, for the fabrication of a silicon transistor multiple approaches were studied, namely silicon nanowires etched into silicon on insulator material, bulk silicon finFET transistors and planar silicon transistors. It was found that the bulk silicon finFET and the planar silicon transistor worked most reliably in terms of fabrication as well as showed the best electrical performance. All the fabricated devices have been tested at room temperature to quantify yield and select suitable devices for low temperature measurements. The devices measured at low temperature clearly exhibit signs of superconductivity in the DC electrical transport channel of the silicon transistor. These signs are the observation of a gap in the electrical current through the device with an energy scale of the superconducting gap of the contact material and the ability to close said gap by applying an external magnetic field. This is the first indication that a semiconductor-superconductor hybrid weak linked has been realized in silicon. At this stage more material characterization is going on in order to reduce the channel resistance which is likely the reason for not yet observing a supercurrent through the developed devices.
The results of all the technical work performed have been exploited continuously in order to improve the next generation of devices. The results have also been disseminated at local and international research seminars/conferences but have not yet been published in peer review journals. However, the fabrication method for one of the superconducting material stacks allowing to fabricate a superconducting silicon transistor has been filed as a patent.
Simultaneous to the technical work the fellow of the project was trained in all the required CMOS fabrication and characterization techniques as well as the device characterization.
There is no specific project website. However, the URL supplied here links to a website describing the project.
The results of all the technical work performed have been exploited continuously in order to improve the next generation of devices. The results have also been disseminated at local and international research seminars/conferences but have not yet been published in peer review journals. However, the fabrication method for one of the superconducting material stacks allowing to fabricate a superconducting silicon transistor has been filed as a patent.
Simultaneous to the technical work the fellow of the project was trained in all the required CMOS fabrication and characterization techniques as well as the device characterization.
There is no specific project website. However, the URL supplied here links to a website describing the project.
The observation of the superconducting gap in the electrical transport signal of the silicon transistor is a significant step beyond the state of the art. This shows that if the quality of the materials involved is improved, i.e. metal-silicide silicon interface and silicon channel resistance, it will be possible to develop novel superconducting quantum circuits that are purely based on silicon technology (CMOS). This will enable utilizing regular CMOS processing techniques for scaling current quantum circuits to larger systems allowing to harness their properties for quantum information processing.