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Contenido archivado el 2024-04-30

New X-Ray Imaging Sensors

CORDIS proporciona enlaces a los documentos públicos y las publicaciones de los proyectos de los programas marco HORIZONTE.

Los enlaces a los documentos y las publicaciones de los proyectos del Séptimo Programa Marco, así como los enlaces a algunos tipos de resultados específicos, como conjuntos de datos y «software», se obtienen dinámicamente de OpenAIRE .

Resultado final

GaAs pixel detectors with a pixel size of 35mm based on semiinsulating (SI) and vapour phase epitaxial (VPE) substrates have been fabricated, flip-chip bonded to ACREO’s charge integrating readout chip and thinned down to a total thickness between 75mm and 250mm. The investigated GaAs pixel detectors show a spatial resolution of 12.4 lp/mm and a SNR in the range between 15 and 45 at an exposure dose of 72mGy. SI-GaAs pixel detectors show local variations in dark current and X-ray sensitivity across the active detector area. As long as these local variations are not time dependent significant improvements in image quality and SNR can be achieved by applying suitable gain and offset corrections.
In hybrid sensors, detector and readout circuit is divided into two separate chips. The interconnections between the pixel detector and the readout integrated circuit chip (ROIC) are provided by small indium bumps and the use of flip chip technology. The approximately cylindrical shaped indium bumps intended for a pixel size of 38 x 38 mm have a diameter of 12 mm and a height of 7 mm. Both, detector and ROIC, were aligned and flip chip bonded under cold compression. Epoxy under filler was applied to the device mainly to improve adhesion and mechanical strength. Because all interconnections are produced simultaneously, a very large number and high density of interconnections can be produced in a very efficient way. Up to 307 000 interconnections on a single hybrid sensor have been fabricated with a density of 160 000 interconnections/cm(2). An advantage of hybrid 3D multi chip modules compared with monolithic devices is the fact that, the single chips can be optimised separately. This allows the combination of different device technologies and substrate materials that makes it attractive for many applications.

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