Realisation and simulation of high-voltage power devices in silicon carbide material

Información del proyecto

Identificador del acuerdo de subvención: INTAS-93-0543

Proyecto cerrado

Fecha de inicio 1 Abril 1995

Fecha de finalización 31 Marzo 1996

Financiado con arreglo a

• International Association for the promotion of cooperation with scientists from the independent states of the former Soviet Union (INTAS), 1993-

Coste total € 0,00

Aportación de la UE € 50 000,00

Coordinado por

Centre National de la Recherche Scientifique
France

Exploitable results

Realization and simulation of high-voltage power devices in silicon carbide material

The purpose of the present programme was to study SiC capability at high voltage, above a few kilovolts, through the simulation and realization of SiC junction diodes. On one hand, the first requirement for high voltage device ratings is the production of low-doped (less than 1016 cm-³) and thick (more than 10µm) good quality SiC layers. Being in current development, the use of LPSD's CVD set-up, resulted in the growth of thin 6H-SiC films with doping concentrations of the order of 1017 cm-³. Consequently, specific equipment has been prepared that will allow the growth rate increase in the next study stage. Moreover, the importance of free-defect substrates for good crystalline quality of epitaxial layers has been shown. On the other hand, geometry and surface layer characteristics near the edge of the reverse biased junction have to be carefully chosen in order to avoid excessive electric field in this device region. MESA shaping is a commonly used technique for periphery guard, that has been demonstrated to be feasible for SiC based structures using plasma etching. As good quality dielectric films are required for MESA surface protection under reverse biases, SiO2 films, produced by SiC wet oxidation and Si3N4 films, obtained by Low Pressure Chemical Vapour Deposition, have been investigated. Besides, a potentially interesting technique for electric field reduction near p+nn+-MESA structure periphery consists in n-type layer surface compensating using Boron doping. The profitable effect of Boron diffusion on breakdown voltage improvement could be demonstrated for diodes based on Sublimation-Epitaxy layers above Lely substrates. A study of Boron doping by implantation was also initiated within this project frame. The further development of the above protection techniques and their application to p+nn+ MESA structure, based on CVD epilayers, will constitute the next phase of this study of high voltage SiC ability.