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Learning and Teaching Operations Research and Management Science (OR/MS) with a Web based Hypermedia Learning Environment

Objective

We will develop an optical interconnect family for a high data rate, 2D array optical interconnect between ICs, applicable at the IC-access, board level and at the board-to-board level. The technology will be applied to high-end IP-router systems. Architectural studies will be performed in order to address future challenges in high performance, high bandwidth systems. 2D VCSEL and photo detector arrays and their respective analogue CMOS circuit interfaces will be designed, prototyped and assessed. The optical interface to the digital chip will be established by directly flip-chip mounting the opto-arrays on top of the CMOS, thus circumventing the chip access bottleneck. Suitable packaging methods for this assembly will be developed. PCB integrable guided wave optical waveguides (plastic optical fibre, glass sheet waveguides) will be investigated. We will develop an optical interconnect family for a high data rate, 2D array optical interconnect between ICs, applicable at the IC-access, board level and at the board-to-board level. The technology will be applied to high-end IP-router systems. Architectural studies will be performed in order to address future challenges in high performance, high bandwidth systems. 2D VCSEL and photo detector arrays and their respective analogue CMOS circuit interfaces will be designed, prototyped and assessed. The optical interface to the digital chip will be established by directly flip-chip mounting the opto-arrays on top of the CMOS, thus circumventing the chip access bottleneck. Suitable packaging methods for this assembly will be developed. PCB integrable guided wave optical waveguides (plastic optical fibre, glass sheet waveguides) will be investigated.

OBJECTIVES
We will develop an optical interconnect family for a high data rate, 2D array optical interconnect between ICs, applicable at the IC-access, board level and at the board-to-board level. The approach is based on optical waveguides that are integrable with printed circuit boards, either as a post-solder build-up extension or as a solder-compatible optical layer. The optical waveguides will be based on novel Plastic Optical Fibres, and on advanced layered Glass Sheets with waveguides. Key target parameters aimed for are: channel density from 16/mm2(first generation) to 64/mm2, number of channels (at optical interfaces) ranging from 64 (first generation), to 256, data rate between 1.25 Gb/s and 2.5 Gb/s or higher. We will demonstrate a complete optical interconnect technology family in a major application area, being that of core IP routers.

DESCRIPTION OF WORK
The key objectives of the project are to develop an optical interconnect technology family for two-dimensional high bandwidth interconnect between ICs and to demonstrate the viability of this family in a major application area, being that of core IP routers. For this to be feasible, the contributions of all partners are important. Alcatel Bell will analyse the current and future high-performance IP routers and pinpoint the exact nature of the bottlenecks and the places where they occur in the systems. The results of this study will then be used to set the specifications and define the design for the demonstrator implementing core IP router functionality. These specifications will have an impact on the design of the light sources (designed and manufactured by Avalon Photonics), the design of the driver and receiver circuits (by Helix) and the development of detector arrays (by Op to Speed). The specifications will also have a large impact on the design of the optical pathway (POF fibre ribbons produced by Alcatel Cable, micro-wiring POF flex-print of RCI, glass sheets from PPC Electronics, connectors and optical pathway interface blocks by FCI and IMEC) and its integration in or on the board or backplane. To reduce the initial effort of introducing op to-electronic components for future applications, the project will also put significant effort into setting up a design flow that takes opto-electronic components into account. Therefore, IMEC will contribute to set up a design methodology and integrate specifications and implementation of opto-electronic components into current (electronic) EDA (Electronic Design Automation) tools. This design methodology will also be used for the design and implementation of the core IP router demonstrator.

Funding Scheme

CSC - Cost-sharing contracts

Coordinator

INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW
Address
Kapeldreef 75
3001 Leuven
Belgium

Participants (9)

ALCATEL CIT
France
Address
Rue De La Baume 12
75008 Paris
AVALON PHOTONICS LTD
Switzerland
Address
Badenerstrasse 569
8048 Zuerich
COMMISSARIAT A L'ENERGIE ATOMIQUE
France
Address
31-33 Rue De La Federation
75752 Paris Cedex 15
FCI 'S-HERTOGENBOSCH B.V.
Netherlands
Address
Helftheuvelweg 11
5222 AV Den Bosch
HELIX AG
Switzerland
Address
Wolfbachstrasse 9
8032 Zuerich
NEXANS CABLING SOLUTIONS
Belgium
Address
Rue Des Chardons 44 B 6
1030 Bruxelles
NEXANS FRANCE
France
Address
16 Rue De Monceau
75008 Paris
PPC ELECTRONIC AG
Switzerland
Address
Riedstrasse 2
6330 Cham
RAPIDE CIRCUIT IMPRIME (RCI)
France
Address
Rue Des Malines 5
91090 Lisses