Objective
The hypothesis at the base of the project is that future wireless communications terminals will require software and hardware reconfigurability to adapt to a variety of radio access bearers and to variations of use and context requirements. The ADRIATIC project brings together CAD tools technology providers, wireless communications technology providers, IP providers and manufacturers of wireless communication ICs to jointly exploit the area of hardware/software co-design of Reconfigurable SoCs. The main objective of the project is the development of a technology independent high-level hardware/software co-design and co-verification methodology for Reconfigurable SoCs. The ADRIATIC methodology will be validated through the design and implementation of two reconfigurable processors (a baseband communication processor and an application processor) for wireless terminals.
Objectives:
The scientific/technological and business objectives of the ADRIATIC project are listed below:
(a) development of an advanced high-level hardware/software co-design and co-verification methodology and tools for reconfigurable SoCs, supplemented with back-end design tools for the implementation of the reconfigurable logic blocks of the chip,
(b) definition of the requirements of a reconfigurable SoC technology for reconfigurable SoCs processors for wireless terminals,
(c) implementation of two reconfigurable processors for HIPERLAN/2 wireless terminals (a video application processor and a baseband communication processor),
(d) evaluation/measurement of the efficiency of the ADRIATIC methodology using the appropriate metrics of SoC design area,
(e) exploitation of the developed ADRIATIC methodology/tools and of the two reconfigurable processors for wireless LAN terminals by the partners of the project.
Work description:
The first workpackage (WP) of the ADRIATIC project aims to the definition of the requirements for the Reconfigurable SoCs for the class of applications of wireless LAN products. In parallel, a survey of commercially available reconfigurable SoC technologies (silicon technology characteristics, architecture and back-end design tools) will be conducted. The outcome of these tasks will be the identification of targeted Reconfigurable SoC technology to be used for the evaluation of the ADRIATIC methodology. Within the second WP, the necessary enhancements of existing high-level hardware/software co-design methodologies and tools developed by the CAD technology providers of the ADRIATIC consortium will be specified. The third WP addresses the development of the necessary new tools, adaptations of existing ones, interfacing with commercially available ones, and finally the full instantiation of the ADRIATIC methodology supplemented with its back-end design tools. Within the forth WP, the ADRIATIC methodology will be used for the design and implementation of two reconfigurable processors. The first will be a reconfigurable video application processor for wireless terminals and the second one a wireless communication baseband processor. The wireless terminals that are targeted are HIRELAN/2 broadband wireless terminals. For the purposes of the ADRIATIC project, the capability of the processor to execute the critical part of the protocol stack (medium access control and link layers) will be demonstrated. The ADRIATIC methodology will be evaluated using appropriate metrics that will be specified in this WP. The dissemination activities and the joint and individual exploitation activities of the partners, for the ADRIATIC methodology and the tools that will be developed as well as for the two reconfigurable processors for wireless terminals, are included in the fifth WP.
Milestones:
1) Reconfigurability requirements for wireless LAN terminals, by month 6,
2) ADRIATIC targeted reconfigurable SoC technology, by month 12,
3) Definition of ADRIATIC high-level hardware/software co-design methodology for reconfigurable SoCs, by month 15,
4) Instantiation of the ADRIATIC methodology (prototype), by month 27,
5) A reconfigurable video processor and a reconfigurable baseband processor for wireless terminals, by month 36.
Fields of science (EuroSciVoc)
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques. See: The European Science Vocabulary.
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques. See: The European Science Vocabulary.
- natural sciences computer and information sciences software
- natural sciences computer and information sciences computer security access control
- natural sciences chemical sciences inorganic chemistry metalloids
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Coordinator
19002 PEANIA - ATTIKI
Greece
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