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REsearch and Training Action for System ON Chip Design

Objectif

The goal of this project is to facilitate integration of the academic and research institutions of Central and Eastern Europe working in the field of microelectronics into the mainstream R&D activities going on in EU countries and to minimise the consequences of the microelectronic skills shortage in Europe. To achieve this goal, the project aims at raising the level and the number of highly-skilled researchers and designers in CEE countries. This will be achieved by training courses, workshops, development of educational VLSI chip and other actions organised together with academic and research institutions from EU countries which have experience in industrially oriented research and links with the industry. The actions of the project include also analysis of the needs of local industries in the countries of Central and Eastern Europe as well as training and promotional actions addressed to local SMEs.

The main objectives of the project are as follows:
1) Raising the level of awareness of industrial problems and the level of competencies among researchers in CEE in methodologies of system-on-chip design and test and analogue and mixed signal IC design for wireless communication, networking, and multimedia;
2) Strengthening of links between academic and industrial partners, in order to facilitate formulation of new RTD projects and formation of project consortia;
3) Maintaining and expanding the research infrastructure in the academic and research institutions of Central and Eastern Europe;
4) Knowledge transfer to the SMEs and raising the level of awareness of the IST programme, in order to facilitate participation of SMEs in FP5 projects.

Work description:
The workplan includes the following activities:
- Introductory actions;
- Analysis of needs of local industries in CEE countries;
- Access to EUROPRACTICE by partners from Ukraine and Belarus;
- Training actions in the field of system-on-chip design and ASICs for wireless communication, networking, and multimedia;
- Practical training in usage and maintenance of advanced CAD tools;
- Development of EDUCHIP;
- Special VLSI chip for microelectronic education;
- Topical workshops devoted to tutorial-based discussions of narrow but vital areas of research in microelectronic design;
- Development and deployment of Web-based training materials;
- Special conference sessions and/or tutorials on industrial and educational problems.

The partners from EU member states will play three important roles:
- They will provide information, help and guidance for project partners which aim at joining EUROPRACTICE and start their training and research in close co-operation with the microelectronic community of the unified Europe,
- They will bring to the project their expertise in state-of-the-art methodologies and tools of system-on-chip design, and
- They will provide links to the European microelectronic manufacturers.

Competencies of the partners from Central/Eastern Europe will be also exploited. In many actions training will be provided by joint teams of co-operating researchers and academic teachers from EU partner institutions and from Central/Eastern Europe.

This will have three important effects:
- The EU partner institutions will be able to learn more about competencies of their colleagues from Central/Eastern Europe,
- The actions will fit better the interests and needs of the partners from Central/Eastern Europe,
- The actions of the project will be more cost-effective.

Milestones:
M1 (month 12): new institutions join EUROPRACTICE; 1st phase of training completed; specification of EDUCHIP;
M2 (month 18): new institutions' staff fully trained;
M3 (month 24): 2nd phase of training completed; EDUCHIP designed and prototyped;
M4 (month 36): all actions of the project completed.

Expected results: research staff from 30+ institutions in CEE trained, 4 or more new EUROPRACTICE members, new courses developed and included in the EUROTRAINING portfolio, new distance learning materials available on the Web, educational VLSI chip designed, prototyped and made available to European universities.

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ACM - Preparatory, accompanying and support measures

Coordinateur

POLITECHNIKA WARSZAWSKA
Contribution de l’UE
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Adresse
PLAC POLITECHNIKI 1
00-661 WARSZAWA
Pologne

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Coût total

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Participants (21)

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Dernière mise à jour: 13 Juin 2005

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Permalink: https://cordis.europa.eu/project/id/IST-2000-30193/fr

European Union, 2025

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