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DEVELOPMENT OF A NON DESTRUCTIVE TEST METHOD BASED ON ACOUSTIC MICROSCOPY FOR PROCESS MONITORING OF POWER SEMICONDUCTOR DEVICE MANUFACTURE

Objective


Researchers have demonstrated that Scanning Acoustic Microscopy is a viable non-destructive technique for defect characterization in power semiconductor manufacturing. This technique is now used for in-line routine inspection by one of the project partners.
DURING PRODUCTION OF SEMICONDUCTOR DEVICES, DEFECTS ARE INEVITABLY INTRODUCED AT VARIOUS PROCESS STAGES, WHICH MAY RESULT IN REDUCED ELECTRICAL PERFORMANCE OR MANUFACTURING YIELD LOSS. EXAMPLES OF SUCH DEFECTS ARE MICROCRACKING OF THE SILICON WAFER OR VOIDS AT THE SILICON-CONTACT METALLIZATION INTERFACE. THE EFFECTS OF THESE DEFECTS ARE PARTICULARLY IMPORTANT IN POWER SEMICONDUCTOR DEVICES (P-I-N DIODES, BJTS, SCRS, RCTS, GTOS), SINCE HIGH VOLTAGE AND CURRENT RATINGS ARE REQUIRED FROM VERY LARGE AREA DEVICES WITH DIAMETERS UP TO 125 MM.
THE PURPOSE OF THIS PROJECT IS TO IDENTIFY AND CHARACTERIZE THE DEFECTS USING SCANNING ACOUSTIC MICROSCOPY (SAM) TECHNIQUES, WITH THE AIM OF DEVELOPING A NON-DESTRUCTIVE TEST METHOD FOR ON-LINE PROCESS MONITORING OF POWER SEMICONDUCTOR DEVICES MANUFACTURE. THIS RELATIVELY NEW TECHNIQUE IS EXPECTED TO PROVIDE UNIQUE INFORMATION FOR PROCESS AND DEVICE CHARACTERIZATION. THREE MAIN AREAS OF ACTIVITY WILL BE ADDRESSED.

THE FIRST PART OF THE PROJECT WILL BE DEVOTED TO THE CALIBRATION OF THE VARIOUS SAM EQUIPMENTS USED. A MEASUREMENT PROTOCOL AND A CALIBRATION METHODOLOGY WITH MATERIALS USED IN SEMICONDUCTOR PROCESSING WILL BE DEVELOPED.
THE CORE OF THE PROJECT WILL BE THE SAM INVESTIGATION OF POWER SEMICONDUCTOR SAMPLES CONTAINING KNOWN DEFECTS, CROSS-IDENTIFIED BY ALTERNATIVE ANALYTICAL TECHNIQUES. THIS ACTIVITY WILL PROVIDE THE ACOUSTIC CHARACTERIZATION OF THE VARIOUS DEFECTS STUDIED.

FINALLY THE DIGITAL PROCESSING OF ACOUSTIC IMAGES AND A STATISTICAL CONTROL PROCEDURE FOR THE AUTOMATIC IDENTIFICATION OF DEFECTS WILL BE CONSIDERED.
THE RESULTS OF THIS WORK ARE EXPECTED TO LEAD TO THE DEVELOPMENT, NOT NECESSARILY COMPLETED WITHIN THIS PROJECT, OF AN INDUSTRIAL SYSTEM FOR ON-LINE MONITORING OF POWER SEMICONDUCTOR DEVICE MANUFACTURE.

Funding Scheme

CSC - Cost-sharing contracts

Coordinator

Ansaldo Trasporti SpA
Address
Via Nuova Delle Brecce 260
80147 Napoli
Italy

Participants (4)

Bertin et Cie S.A.
France
Address
59,Rue Pierre Curie 59
78373 Plaisir
GEC Plessey Semiconductors plc
United Kingdom
Address
Cheney Manor
SN2 2QW Swindon
Università degli Studi di Genova
Italy
Address
11 A,via Opera Pia 11/A
16145 Genova
Université de Montpellier II (Université des Sciences et Techniques du Languedoc)
France
Address
2 Place Eugène Bataillon
34095 Montpellier