CORDIS

HPC has been identified as one of the key pillars of the Digital Single Market (DSM) strategy adopted by the European Commission recognising its capacity to promote science, industrial innovation and ultimately
social prosperity. Societal challenges, human curiosity and industrial innovation demand solutions to problems with higher quality, in shorter time, and at larger scales. We require the solution of new and complex challenges in global climate change, air pollution, high-frequency trading, huge social networks, personalised healthcare, energy-efficient combustion engines, optimised design of new materials and many others. Several critical research areas and problem classes such as weather prediction with fine granularity, climate change, large eddy simulation for turbulence modeling in aeronautics, the challenges in fusion research, to name a few, are beyond current computing capabilities and need exaflop-level performance and even more. Unfortunately, scaling up to exascale is far from trivial and can by no means rely upon conventional scaling approaches embraced during the last fifteen years. Current practices for building supercomputers rely on architectures, microprocessors, accelerators and memory modules that were designed and optimised to cope with the demands of different markets (desktop, server, graphics, gaming, etc.) glued together with high-performance interconnection networks. While this was a viable and cost-effective approach to drive systems up to the current scale, it cannot lead to the exascale in a straightforward way.

HPC is well known for the gap between the theoretical peak performance of an actual platform and the achieved performance when running real applications. To reduce this disparity, a platform must be designed based on a thorough understanding of the applications and the system software, while the applications themselves must leverage the full capabilities of the underlying hardware and software stack. EuroEXA will design and implement an instantiation of a new groundbreaking system architecture that better balances the required computing resources compared to today’s systems, supporting the acceleration of key applications. To accomplish this, we will follow a system-level co-design approach with appropriate employment of a wide range of typical and non-conventional HPC codes.

According to the project workplan, M1-M12 has been characterized as “input and assessment” phase for the project. In particular, during this period our aim was to collect information from various sources, assess this input and provide concrete guidelines towards the implementation of the project in the next phases. Specifically, the input collected during the reported period has been:
- Architectural designs, hardware and software design and implementation experiences from the parent projects ExaNeSt, ExaNode and ECOSCALE.
- Application requirements.
- Hands-on experience by porting (mainly) and optimization (partially) of application codes on testbeds that expose characteristics similar to the target EuroEXA architecture.
- Matchmaking information from the collaboration of application experts with runtime systems to better support application needs and expose hardware capabilities to the applications themselves.
- Results from hardware/software co-design collaboration between application experts, system software and runtimes experts and hardware experts.
- Experience gained by building a small scale system capable of exposing the entire set of HPC capabilities including applications, runtime systems, system software, resource management and user support, on top of novel hardware compute nodes.

Based on the aforementioned input, the following solid results have been produced that are expected to facilitate the implementation of the forthcoming phases of the project, towards the accomplishment of its ambitious objectives:
- Further refinement of the EuroEXA node architecture.
- A solid implementation plan towards our second testbed.
- A clear understanding of the interaction between applications, runtime systems and hardware features, and the relevant integration challenges.
- A concrete plan for each application towards porting and optimization on the EuroEXA architecture.

EuroEXA is anticipated to progress current state-of-the-art across the entire HPC stack involving applications, runtime systems, node and system architecture, interconnects and datacenter design. The results of the project will include a scalable EuroEXA architecture refined and brought to petaflop level through a number of testbed deployments at an operational facility, a scalability plan on how to deliver an exascale level system by 2023, a co-designed compute node that reduces the gap between the peak and realised performance of a system, utilizing advanced general purpose processors, reconfigurable accelerators and memory hierarchy optimisations, system software and runtime systems to support efficient execution of HPC applications on EuroEXA platforms and a number of application codes across the target HPC domains ported and optimised to demonstrate the scalability and capability of the EuroEXA platform.