Electronic design automation software
Mixed-signal and radio frequency integrated circuit designers are often confronted with noise-coupling issues. Noise coupling through the substrate cannot be easily taken into account. Designs are usually over-engineered since considerable time is spent on laying out the chip and adding large insulation structures. Immediate and unavoidable consequence occurs through the rise of costs. Even though an exact theoretical solution exists for a three-dimensional finite element model calculation, in practise as industries report, this theoretical solution is unusable. A suite of electronic design automation software tool, termed LAYIN, will now enable integrated circuit designers to account for noise coupling through the substrate. The software models the substrate in three dimensions in contrast to former approaches of using two dimensions that were proven inaccurate. The model provides answers much faster than the three-dimensional theoretical model of the substrate, as previously mentioned. LAYIN is able from a functional net list, the integrated circuit layout and a short description of the technology, to extract the parasitic substrate model of the circuit, to complete the simulation data files and display the substrate noise distribution. Moreover, it contains a parameterisation tool for creating technology descriptions from fabrication process data. The LAYIN suite will enable designing and manufacturing companies of integrated circuits to reduce time to market, incorporate more functions in their design, reduce over-engineering and minimise the size. The wealth of advantages offered have already attracted considerable interest from companies like, Texas Instruments and Hitachi, who are among the early customers of the software tool LAYIN. Additional information from the product developers may be requested at the e-mail address: info@snaketech.com
