Periodic Reporting for period 3 - StorAIge (Embedded storage elements on next MCU generation ready for AI on the edge)
Reporting period: 2023-07-01 to 2024-10-31
The main objective of the StorAIge project is the development and industrialization of FDSOI 28nm and next generation embedded Phase Change Memory (ePCM) world-class semiconductor technologies, allowing the prototyping of high performance, Ultra low power and secured & safety System on Chip (SoC) solutions enabling competitive Artificial Intelligence (AI) for Edge applications. The main challenge addressed by the project is on one hand to handle the complexity of sub-28nm ‘more than moore’ technologies and to bring them up at a high maturity level and on the other hand to handle the design of complex SoCs for more intelligent, secure, flexible, low power consumption and cost effective system applications. The project is targeting chipset and solutions with very efficient memories and high computing power targeting 10 Tops per Watt.
The development of the most advanced automotive microcontrollers in FDSOI 28nm ePCM will be the main stream to demonstrate the high performance and the robustness of the ePCM solution. The next generation of FDSOI ePCM will target general purpose advanced microcontrollers usable for large volume Edge AI application in industrial and consumer markets with the best compromise on three requirements: performances, low power and adequate security.
On top of the development and industrialization of silicon process lines and SoC design, StorAIge will also address new design methodologies and tools to facilitate the exploitation of these advanced technology nodes, particularly for high performance microcontrollers having AI capabilities. Activities will be performed to setup robust and adequate Security and Safety level in the final applications, defining and implementing the good ‘mixture’ and tradeoff between HW and SW solutions to speed up adoption for large volume applications.
The development of the most advanced automotive microcontrollers in FDSOI 28nm ePCM will be the main stream to demonstrate the high performance and the robustness of the ePCM solution. The next generation of FDSOI ePCM will target general purpose advanced microcontrollers usable for large volume Edge AI application in industrial and consumer markets with the best compromise on three requirements: performances, low power and adequate security.
On top of the development and industrialization of silicon process lines and SoC design, StorAIge will also address new design methodologies and tools to facilitate the exploitation of these advanced technology nodes, particularly for high performance microcontrollers having AI capabilities. Activities will be performed to setup robust and adequate Security and Safety level in the final applications, defining and implementing the good ‘mixture’ and tradeoff between HW and SW solutions to speed up adoption for large volume applications.
Significant progress has been made in silicon technologies, particularly in embedded non-volatile memory technologies. The volume qualification of the 28nm FDSOI ePCM process and its more advanced 18nm version has been accomplished. The 28nm FDSOI ePCM process has been successfully integrated into automotive control units enhancing their performance and reliability. The 18nm version, being more advanced, has shown promising results in consumer electronics (General Purpose MCU), providing faster and more efficient memory solutions.
Regarding other types of non-volatile memories (FeRAM, OxRAM), the work has led to significant qualifications for industrial use, including in the automotive sector, which has very high mission requirements. For instance, the integration of FeRAM technology in automotive system on chip has improved data retention and reliability under extreme conditions, meeting the stringent demands of the automotive industry. The progress has been notable compared to the internal roadmap of the various partners and also in comparison, with the state of the art. This is particularly the case for microcontrollers in the automotive and general-purpose fields. The implementation of a neural core (NPU) within the chips has been achieved, with ST launching the first microcontroller dedicated to artificial intelligence (STM32N6) and developing its associated ecosystem. The key HW components are now available for sampling, including the N6 MCU circuit from ST and coming soon with commercial launch, the new generation of MCU with embedded ePCM memory in FDSOI 18nm. These advancements allow for the completion of the project's demonstrations and are ready for second implementation thanks to the feedback received from the final application developers.
The 4-month extension enabled, in some cases, the wrapping up of technical activities around the use cases and the realization of the demonstrations. In the context of this final year of the project and following the recommendations from the last review, work has been started to look more closely at the impact of the new technologies (especially HW) developed in the project on the use cases of the end-users.
The project has achieved significant progress in implementing AI across various market segments, including Industry, Automotive, Consumer, and Secure sectors. Key milestones have been reached, and technology development has advanced considerably. Future efforts will focus on addressing challenging subjects, enhancing modelling activities, transferring technology to industries, launching new products, and fostering ongoing collaborations. A second round of implementation is poised to be essential for releasing innovative and robust AI solutions (objectives of the NeAIxt project), particularly in regulated domains such as healthcare, where dataset access and labelling are governed by ethical authorities.
Regarding other types of non-volatile memories (FeRAM, OxRAM), the work has led to significant qualifications for industrial use, including in the automotive sector, which has very high mission requirements. For instance, the integration of FeRAM technology in automotive system on chip has improved data retention and reliability under extreme conditions, meeting the stringent demands of the automotive industry. The progress has been notable compared to the internal roadmap of the various partners and also in comparison, with the state of the art. This is particularly the case for microcontrollers in the automotive and general-purpose fields. The implementation of a neural core (NPU) within the chips has been achieved, with ST launching the first microcontroller dedicated to artificial intelligence (STM32N6) and developing its associated ecosystem. The key HW components are now available for sampling, including the N6 MCU circuit from ST and coming soon with commercial launch, the new generation of MCU with embedded ePCM memory in FDSOI 18nm. These advancements allow for the completion of the project's demonstrations and are ready for second implementation thanks to the feedback received from the final application developers.
The 4-month extension enabled, in some cases, the wrapping up of technical activities around the use cases and the realization of the demonstrations. In the context of this final year of the project and following the recommendations from the last review, work has been started to look more closely at the impact of the new technologies (especially HW) developed in the project on the use cases of the end-users.
The project has achieved significant progress in implementing AI across various market segments, including Industry, Automotive, Consumer, and Secure sectors. Key milestones have been reached, and technology development has advanced considerably. Future efforts will focus on addressing challenging subjects, enhancing modelling activities, transferring technology to industries, launching new products, and fostering ongoing collaborations. A second round of implementation is poised to be essential for releasing innovative and robust AI solutions (objectives of the NeAIxt project), particularly in regulated domains such as healthcare, where dataset access and labelling are governed by ethical authorities.
By putting together key players of the AI value chain, StorAIge will help to predict and define what tasks AI will be applied to tomorrow, at the edge devices with a special focus on Automotive, Industrial/Consumer and Secure applications, providing the best-in-class silicon-based solutions.
StorAIge is pursuing a short and middle term R&D program to explore introduction of the following technologies into products with a multidisciplinary approach:
• Neural Networks have emerged as a powerful complementary tool to augment systems with more complex functionality
• Classical approaches of digital HW architectures already hitting a wall in terms of memory bandwidth and compute density
• Quantized and Binary Neural Networks offer a step forward in terms of complexity and energy consumption reduction
•In Memory Compute (IMC) is seen as the most promising technology forward that requires a multidisciplinary approach to be successful o Materials o New devices (e.g. PCM cells)
o New macro-cells structures (IMC)
o New ways of thinking applications, systems and ad-hoc training
• Analog IMC promises another order of magnitude for compute and power densities.
The main goal in StorAIge is to achieve ASIC comparable efficiency by exploiting different eNVM technologies (FD-SOI 28nm PCM, OxRAM, FeRAM) and configurable accelerators. Many of these accelerators and their design methodologies are already at high TRL level. By applying them to 15 concrete industrial use cases in a state-of-the-art technology and leveraging the ePCM / NVM, StorAIge will create a complete ecosystem of technology, architecture, design method and applications to address the extreme energy efficiency, security, and safety needs of enterprise class of edge AI systems.
The ambition of the project is therefore geared towards these use cases that concentrate improved or new functionalities and represent a significant integration challenge.
StorAIge is pursuing a short and middle term R&D program to explore introduction of the following technologies into products with a multidisciplinary approach:
• Neural Networks have emerged as a powerful complementary tool to augment systems with more complex functionality
• Classical approaches of digital HW architectures already hitting a wall in terms of memory bandwidth and compute density
• Quantized and Binary Neural Networks offer a step forward in terms of complexity and energy consumption reduction
•In Memory Compute (IMC) is seen as the most promising technology forward that requires a multidisciplinary approach to be successful o Materials o New devices (e.g. PCM cells)
o New macro-cells structures (IMC)
o New ways of thinking applications, systems and ad-hoc training
• Analog IMC promises another order of magnitude for compute and power densities.
The main goal in StorAIge is to achieve ASIC comparable efficiency by exploiting different eNVM technologies (FD-SOI 28nm PCM, OxRAM, FeRAM) and configurable accelerators. Many of these accelerators and their design methodologies are already at high TRL level. By applying them to 15 concrete industrial use cases in a state-of-the-art technology and leveraging the ePCM / NVM, StorAIge will create a complete ecosystem of technology, architecture, design method and applications to address the extreme energy efficiency, security, and safety needs of enterprise class of edge AI systems.
The ambition of the project is therefore geared towards these use cases that concentrate improved or new functionalities and represent a significant integration challenge.