Periodic Reporting for period 2 - PHORMIC (Wafer-scale platform for Photonic Programmable Multipurpose Integrated Circuits)
Período documentado: 2023-10-01 hasta 2025-03-31
PHORMIC is building a European platform for next-generation programmable photonic chips with a low adoption threshold for product developers in diverse application domains. The PHORMIC platform consists of three tiers, enabling photonics developers at different levels of abstraction.
The first tier is a photonic chip platform, based on 200 mm wafer-scale silicon photonics augmented with transfer-printed III-V optical amplifiers, organic hybrid electro-optic modulators and compact low-power MEMS actuators. The devices are encapsulated in wafer-scale hermetically sealed cavities that will also be used for on-chip gas cells that act as an absolute calibration reference for the on-chip widely tunable lasers. The combination of large-scale silicon photonics, broadband optical gain, high-speed modulation and low-power MEMS tuners is a true enabler for new applications. The process flow is supported by a design kit for building complex photonic circuits.
The second tier supplements the photonic chips with modular packaging processes and driver electronics (including high-speed drivers), and the packaging and connectivity logic are integrated in the design kit. This provides a low-threshold entry point for building complex photonic chip-based systems with active control and programmability.
The third tier creates a multipurpose programmable photonic processor, which can control the flow of light in an analogue way through a software interface. This chip, together with its electronics and programming framework, forms a true “photonics development kit”. This enables an off-the-shelf use model like that of electronic FPGAs, reducing prototyping time for new concepts from more than a year to weeks.
The PHORMIC consortium has all expertise to establish a full supply chain, including a migration path to a European industrial 200 mm foundry. The application potential of the three tiers of the platform is validated through three demonstrators, in datacenter communication, sensing and mm-wave wireless beamforming. For each case, a custom-designed chip will be compared to the multipurpose photonic processor.
The first tier is a photonic chip platform, based on 200 mm wafer-scale silicon photonics augmented with transfer-printed III-V optical amplifiers, organic hybrid electro-optic modulators and compact low-power MEMS actuators. The devices are encapsulated in wafer-scale hermetically sealed cavities that will also be used for on-chip gas cells that act as an absolute calibration reference for the on-chip widely tunable lasers. The combination of large-scale silicon photonics, broadband optical gain, high-speed modulation and low-power MEMS tuners is a true enabler for new applications. The process flow is supported by a design kit for building complex photonic circuits.
The second tier supplements the photonic chips with modular packaging processes and driver electronics (including high-speed drivers), and the packaging and connectivity logic are integrated in the design kit. This provides a low-threshold entry point for building complex photonic chip-based systems with active control and programmability.
The third tier creates a multipurpose programmable photonic processor, which can control the flow of light in an analogue way through a software interface. This chip, together with its electronics and programming framework, forms a true “photonics development kit”. This enables an off-the-shelf use model like that of electronic FPGAs, reducing prototyping time for new concepts from more than a year to weeks.
The PHORMIC consortium has all expertise to establish a full supply chain, including a migration path to a European industrial 200 mm foundry. The application potential of the three tiers of the platform is validated through three demonstrators, in datacenter communication, sensing and mm-wave wireless beamforming. For each case, a custom-designed chip will be compared to the multipurpose photonic processor.
In the second reporting period, the PHORMIC consortium built furthe ron the three tier of the technology platform:
1) The photonic chip technology with Silicon photonic MEMS, high-speed modulators and optical amplifiers: We developed the process for integrating the MEMS, amplifiers and organic materials together on the iSIPP50G platform. In the secod reporting period, we
- developed additional process modules for opening the MEMS and transfer printing cavities on the silicon patform. These were developed and finetuned in IMEC on its 200mm platform
- developed the transfer printing technique for the amplifiers on a 200mm wafer-scale toolset at IMEC-Ghent, and demonstrated operational amplifiers and lasers
- developed the MEMS release process at KTH
- synthesized a first generation of electro-optic organic glasses and developed the inkjet printing process for depositing those materials on iSiPP50G
- designed a set of standard building blocks for these processes, and constructed a full PDK to support the circuit designers.
- fabricated two device lots with the first generateion designs (RUN4) and taped out the secod-generation of designs (RUN5)
2) The programmable photonics platform: photonic and electronic driver chips copackaged with a user-addressable software interface. In the second reporting period, we made the following progress on this tier:
- elaborated the full specifications for the driver and readout electronics
- designed, fabricated and tested prototypes for all the electronics
- designed the production boards
- implemented the low-level software interface and electronics controller
- developed a modular packaging flow for small-scale demostrations, and the corresponding design rules.
- demonstrated a complete packaging flow for larger-scale demonstrators
3) The multipurpose programmable photonic processor: A generic photonic chip that can be programmed to perform a variety of optical functions. For this tier, we made the following progress:
- Designed and fabricated a first chip on RUN4, but not yet packaged and tested
- Studied scaling properties fof meshes, coming up with design choices for RUN5
- Developed filter synthesis and configuration algorithms
- Designed the next-generation programmable circuit for RUN5
1) The photonic chip technology with Silicon photonic MEMS, high-speed modulators and optical amplifiers: We developed the process for integrating the MEMS, amplifiers and organic materials together on the iSIPP50G platform. In the secod reporting period, we
- developed additional process modules for opening the MEMS and transfer printing cavities on the silicon patform. These were developed and finetuned in IMEC on its 200mm platform
- developed the transfer printing technique for the amplifiers on a 200mm wafer-scale toolset at IMEC-Ghent, and demonstrated operational amplifiers and lasers
- developed the MEMS release process at KTH
- synthesized a first generation of electro-optic organic glasses and developed the inkjet printing process for depositing those materials on iSiPP50G
- designed a set of standard building blocks for these processes, and constructed a full PDK to support the circuit designers.
- fabricated two device lots with the first generateion designs (RUN4) and taped out the secod-generation of designs (RUN5)
2) The programmable photonics platform: photonic and electronic driver chips copackaged with a user-addressable software interface. In the second reporting period, we made the following progress on this tier:
- elaborated the full specifications for the driver and readout electronics
- designed, fabricated and tested prototypes for all the electronics
- designed the production boards
- implemented the low-level software interface and electronics controller
- developed a modular packaging flow for small-scale demostrations, and the corresponding design rules.
- demonstrated a complete packaging flow for larger-scale demonstrators
3) The multipurpose programmable photonic processor: A generic photonic chip that can be programmed to perform a variety of optical functions. For this tier, we made the following progress:
- Designed and fabricated a first chip on RUN4, but not yet packaged and tested
- Studied scaling properties fof meshes, coming up with design choices for RUN5
- Developed filter synthesis and configuration algorithms
- Designed the next-generation programmable circuit for RUN5
Much of the PHORMIC work is work-in-progress, but we have demonstrated several steta-of-the-art results, some based on the designs in the earlier MORPHIC project:
- demonstration of broadband optical amplifiers that can be integrated on silicon photonics
- transfer printing of amplifiers on wafer-scale, both as inidividual devices and in arrays
- Demonstration of unique MEMS functionality on silicon photonics (continuation from MORPHIC)
- Demonstration of highly efficient liquid crystal phase shifters
- Demonstration of programmable photonics controlled by the software framework developed in MORPHIC and PHORMIC (the chip itself was not a PHORMIC result)
- Demonstration ogf a programmable microwave processor fabricated in MORPHIC
- demonstration of broadband optical amplifiers that can be integrated on silicon photonics
- transfer printing of amplifiers on wafer-scale, both as inidividual devices and in arrays
- Demonstration of unique MEMS functionality on silicon photonics (continuation from MORPHIC)
- Demonstration of highly efficient liquid crystal phase shifters
- Demonstration of programmable photonics controlled by the software framework developed in MORPHIC and PHORMIC (the chip itself was not a PHORMIC result)
- Demonstration ogf a programmable microwave processor fabricated in MORPHIC