Periodic Reporting for period 2 - PUNCH (Packaging of novel Ultra-dyNamiC pHotonic switches and transceivers for integration into 5G radio access network and datacenter sub-systems)
Période du rapport: 2024-03-01 au 2025-08-31
The increasing demands for emerging high-volume and latency-constrained applications, such as artificial intelligence, autonomous vehicles, and augmented/virtual reality, are imposing stringent requirements on data center network capacity, latency, energy consumption, and guaranteed delivery. Current data center interconnects with static node configurations are being pushed to their limits by the diverse demands of this set of applications. Flexible architectures that match their capacity to an application's traffic pattern can deliver optimized connectivity while eliminating over-provisioned resources. Transparent optical switches are the key enablers. However, as short-reach interconnects approach petabit-scale capacity with massively parallel wavelengths, switching at the wavelength granularity is becoming vital.
The multi-dimensional switch developed within PUNCH offers reconfigurable interconnects from all-to-all links, to imbalanced group-to-group traffic by bandwidth steering. A space-and-wavelength switch fabric forms the core for arbitrarily routing any combination of wavelengths from any input to any output. An extra key lies in the ultra-fast reconfigurability, which is a cornerstone that enables unparalleled dynamics by multiplexing in the time domain. The combination of photonic switching in the space, wavelength and time domains holds great promise for agile, adaptive, and deterministic data center networks.
To ensure low cost per port, optical switching technologies must demonstrate a path towards high-volume manufacturing. Silicon photonics has been identified as a key enabling technology, providing a high-level of integration and compatibility with CMOS processes. However, large-scale switch fabrics pose huge challenges in terms of optical and electrical packaging. Furthermore, insertion loss is limiting commercial uptake, motivating the integration of semiconductor optical amplifiers (SOA) to provide on-chip gain.
Within PUNCH, full thermal, electrical, and optical packaging solutions are incorporated, leveraging semiconductor packaging technology compatible with high-volume manufacturing. The development of a III-V foundry process for micro-transfer-printing compatible semiconductor optical amplifiers enables lossless optical switching on the silicon photonics platform. Custom designed electronic ICs to actuate, control, and power-monitor scaled switch fabrics are densely integrated with the photonic ICs into a heterogeneous fanout wafer-level package (FOWLP), processed on a 200 mm reconstructed wafer platform. In addition, the optical interfacing to the photonic ICs is accomplished using an optical redistribution layer, providing an optical fanout on organic IC-substrates, and allowing for a scalable optical fiber packaging solution.
The novel integration and packaging processes will also be applied for manufacturing optical transceivers providing the interface between optical switches and electronic resources (compute, memory, and storage). Finally, the optical switch and transceiver prototypes will be demonstrated in a 5G RAN Transport Network, for Time-Sensitive Networking Fronthaul applications and for memory disaggregation in data centers.
The multi-dimensional switch developed within PUNCH offers reconfigurable interconnects from all-to-all links, to imbalanced group-to-group traffic by bandwidth steering. A space-and-wavelength switch fabric forms the core for arbitrarily routing any combination of wavelengths from any input to any output. An extra key lies in the ultra-fast reconfigurability, which is a cornerstone that enables unparalleled dynamics by multiplexing in the time domain. The combination of photonic switching in the space, wavelength and time domains holds great promise for agile, adaptive, and deterministic data center networks.
To ensure low cost per port, optical switching technologies must demonstrate a path towards high-volume manufacturing. Silicon photonics has been identified as a key enabling technology, providing a high-level of integration and compatibility with CMOS processes. However, large-scale switch fabrics pose huge challenges in terms of optical and electrical packaging. Furthermore, insertion loss is limiting commercial uptake, motivating the integration of semiconductor optical amplifiers (SOA) to provide on-chip gain.
Within PUNCH, full thermal, electrical, and optical packaging solutions are incorporated, leveraging semiconductor packaging technology compatible with high-volume manufacturing. The development of a III-V foundry process for micro-transfer-printing compatible semiconductor optical amplifiers enables lossless optical switching on the silicon photonics platform. Custom designed electronic ICs to actuate, control, and power-monitor scaled switch fabrics are densely integrated with the photonic ICs into a heterogeneous fanout wafer-level package (FOWLP), processed on a 200 mm reconstructed wafer platform. In addition, the optical interfacing to the photonic ICs is accomplished using an optical redistribution layer, providing an optical fanout on organic IC-substrates, and allowing for a scalable optical fiber packaging solution.
The novel integration and packaging processes will also be applied for manufacturing optical transceivers providing the interface between optical switches and electronic resources (compute, memory, and storage). Finally, the optical switch and transceiver prototypes will be demonstrated in a 5G RAN Transport Network, for Time-Sensitive Networking Fronthaul applications and for memory disaggregation in data centers.
Optical switch fabrics
A 4×4×8λ thermo-optic (TO) switch fabric has been successfully packaged and experimentally validated, fully compliant with CW-WDM MSA standards. It supports independent routing of eight wavelengths, with extinction ratios >30 dB and passbands >60 GHz. Demonstrations include any-to-any bidirectional wavelength/space switching and 1-to-4 multicasting for 5G fronthaul, as well as 100 Gbps wavelength-space routing for AI/data center traffic. Designs of 4×4×4λ and 8×8×4λ TO switches (400G-LR8 standard) have been completed, devices fabricated, and packaging initiated. First electro-optic 1×2×4λ switches are under characterization.
Semiconductor optical amplifiers
A micro-transfer-printing-compatible quantum dot SOA (QD-SOA) process has been developed, with the first fabrication run completed. Imperfections are being addressed via process refinements (e-beam lithography, metal lift-off). A second fabrication run is planned for late 2025. QD-SOAs will be integrated into the optical switches and receivers.
Switch control electronics
Custom high-voltage driver ICs have been designed to actuate switch elements with nanosecond response times. The design, based on XFAB XT018 technology, has been submitted for fabrication, with chips expected by January 2026.
System-in-package integration
Test vehicles for advanced packaging have been demonstrated. Two PICs were embedded in epoxy moulding compound, with high placement precision, to be complemented by 3D nanoprinting for optical alignment. A Fan-out Wafer-Level Package (FOWLP) integrating one PIC and eight EICs was fabricated, achieving good electrical connectivity. For optical redistribution layers (ORDL), low-loss polymer waveguides were developed, showing -0.56 dB coupling for TE polarization at 1310 nm, with low propagation and butt-coupling losses. Integration of fiber arrays with fanout-packaged PICs was optimized, with lidless UHNA arrays selected for final demonstrators due to superior reliability.
Optical transceivers
The 1.6 Tb/s transceiver design has been finalized, supporting 4 spatial channels × 8 wavelengths × 56 Gb/s NRZ signals on a 200 GHz CW-WDM O-band grid. PICs are expected in September 2025. Tx/Rx EICs have been fabricated in 28 nm CMOS and validated. Wafer-level fanout packaging is scheduled to start in October 2025.
Use cases and demonstrations
For 5G RAN, requirements were defined and a LAN-WDM grid fixed for a CRAN demonstrator, where the PUNCH switch dynamically reconfigures fronthaul connections between BBUs and RRUs. In data center disaggregated memory, a prototype using commercial optical pluggables and a Polatis switch has demonstrated 1 µs RTT latency. This setup prepares integration of the PUNCH switch.
In summary, PUNCH has delivered its first optical switches with demonstrated network applications, advanced integration platforms combining PICs/EICs, and packaging methods for optical redistribution. Control electronics and SOA integration are progressing towards enabling scalable non-blocking switch fabrics. The transceiver architecture and use-case demonstrators lay the foundation for validating PUNCH technologies in 5G fronthaul and AI-driven data center environments.
A 4×4×8λ thermo-optic (TO) switch fabric has been successfully packaged and experimentally validated, fully compliant with CW-WDM MSA standards. It supports independent routing of eight wavelengths, with extinction ratios >30 dB and passbands >60 GHz. Demonstrations include any-to-any bidirectional wavelength/space switching and 1-to-4 multicasting for 5G fronthaul, as well as 100 Gbps wavelength-space routing for AI/data center traffic. Designs of 4×4×4λ and 8×8×4λ TO switches (400G-LR8 standard) have been completed, devices fabricated, and packaging initiated. First electro-optic 1×2×4λ switches are under characterization.
Semiconductor optical amplifiers
A micro-transfer-printing-compatible quantum dot SOA (QD-SOA) process has been developed, with the first fabrication run completed. Imperfections are being addressed via process refinements (e-beam lithography, metal lift-off). A second fabrication run is planned for late 2025. QD-SOAs will be integrated into the optical switches and receivers.
Switch control electronics
Custom high-voltage driver ICs have been designed to actuate switch elements with nanosecond response times. The design, based on XFAB XT018 technology, has been submitted for fabrication, with chips expected by January 2026.
System-in-package integration
Test vehicles for advanced packaging have been demonstrated. Two PICs were embedded in epoxy moulding compound, with high placement precision, to be complemented by 3D nanoprinting for optical alignment. A Fan-out Wafer-Level Package (FOWLP) integrating one PIC and eight EICs was fabricated, achieving good electrical connectivity. For optical redistribution layers (ORDL), low-loss polymer waveguides were developed, showing -0.56 dB coupling for TE polarization at 1310 nm, with low propagation and butt-coupling losses. Integration of fiber arrays with fanout-packaged PICs was optimized, with lidless UHNA arrays selected for final demonstrators due to superior reliability.
Optical transceivers
The 1.6 Tb/s transceiver design has been finalized, supporting 4 spatial channels × 8 wavelengths × 56 Gb/s NRZ signals on a 200 GHz CW-WDM O-band grid. PICs are expected in September 2025. Tx/Rx EICs have been fabricated in 28 nm CMOS and validated. Wafer-level fanout packaging is scheduled to start in October 2025.
Use cases and demonstrations
For 5G RAN, requirements were defined and a LAN-WDM grid fixed for a CRAN demonstrator, where the PUNCH switch dynamically reconfigures fronthaul connections between BBUs and RRUs. In data center disaggregated memory, a prototype using commercial optical pluggables and a Polatis switch has demonstrated 1 µs RTT latency. This setup prepares integration of the PUNCH switch.
In summary, PUNCH has delivered its first optical switches with demonstrated network applications, advanced integration platforms combining PICs/EICs, and packaging methods for optical redistribution. Control electronics and SOA integration are progressing towards enabling scalable non-blocking switch fabrics. The transceiver architecture and use-case demonstrators lay the foundation for validating PUNCH technologies in 5G fronthaul and AI-driven data center environments.
The obtained results have been covered in the previous section on main achievements.