Periodic Reporting for period 1 - MIMIC (Monolithically Integrated ReRAM and In-Chip Cooling for Emerging Neuromorphic Applications)
Período documentado: 2022-09-01 hasta 2024-08-31
Prior to the MIMIC project, three-dimensional (3D) laser lithography held significant but largely untapped potential for fabricating in-chip microchannels for cooling, offering a simplified production process. This technique enables the formation of 3D structures through a two-step process involving nanosecond laser irradiation followed by wet chemical etching. Building on these advancements, the project has developed a platform that monolithically integrates on-chip memristive arrays with laser-micro-machined in-chip cooling within a single silicon chip. This integrated approach provides an immediate and effective solution to address the thermal limitations currently constraining computing architectures and holds relevance for other technologies affected by operational heating. By leveraging efficient embedded cooling, the project seeks to drive transformative progress in overcoming the well-known thermal challenges facing future logic and memory technologies.
Key Activities and Achievements:
1. Development of In-Chip Microchannels Using Laser Lithography: The work focused on advancing in-chip microchannel fabrication through laser lithography and wet etching techniques. This approach involved laser patterning to modify silicon’s material properties, followed by wet etching to form the channels. Key process optimizations—including adjustments to laser power, periodic spacing, and scan path—were essential to enhance etching rates and maintain the structural integrity of the channels. A novel surfactant-enhanced etching process was developed to reduce bubble formation, facilitating the successful creation of 10-mm-long buried channels with preserved top and bottom surface quality, critical for subsequent electronic device integration. This method also allowed for extended channel lengths without inherent limitations. Teflon or Kapton tape was employed as a hard mask during etching to protect exposed surfaces.
This advancement establishes a strong foundation for in-chip cooling solutions in high-density electronic applications.
2. Development of Memristor Crossbar Arrays: The development of memristor crossbar arrays advanced through three sequential batches, each incorporating unique device characteristics. In the first batch, W/HfO2/Ti/W devices were fabricated on standard silicon wafers without embedded channels, demonstrating gradual, stepwise resistive switching under voltage sweeps but facing challenges with achieving consistent bipolar switching. The second batch integrated devices onto 3-mm- and 8-mm-wide silicon chips with embedded microchannels, where W/HfO2/Ti/TiN devices exhibited unipolar switching with gradual resistance transitions, mimicking synaptic behavior essential for neuromorphic applications. The third batch featured TiN/HfO2/Ti/TiN and TiN/HfO2/Ti/TiN/W devices on 8-mm- and 10-mm-wide silicon chips with embedded microfluidic channels. These devices required an initial forming voltage of approximately 9 V to activate their switching behavior. Following this forming step, devices displayed multiple low-resistance states under applied voltage sweeps, with gradual conductance modulation expected as programming conditions are optimized.
The work performed across these batches culminated in devices capable of gradual conductance tuning. These results are particularly notable as they mark the first successful integration of functional memristive devices with buried, laser-sculpted in-chip microchannels within a single silicon substrate. This accomplishment represents a significant step forward in monolithically combining electronics and thermal management in compact, high-performance platforms.
3. Integration of Electronics with Cooling Channels: The chips containing embedded microchannels and on-chip electronic devices were further processed into microfluidic platforms, enabling validation of fluid flow through the channels using controlled flow rates. Finite-element simulations were also performed to analyze the thermal effects of embedded microchannels, with results confirming that the integration of these channels significantly enhances the chip's thermal management.