Modular Industrial Large-scaLE quaNtum computing with trapped IONs, phase 1

Información del proyecto

Millenion-SGA1

Identificador del acuerdo de subvención: 101114305

DOI

10.3030/101114305

Fecha de la firma de la CE 31 Marzo 2023

Fecha de inicio 1 Marzo 2023

Fecha de finalización 31 Agosto 2026

Financiado con arreglo a

• Digital, Industry and Space

Coste total

€ 19 980 497,50

Aportación de la UE

€ 19 980 497,50

Coordinado por

UNIVERSITAET INNSBRUCK
Austria

Periodic Reporting for period 1 - Millenion-SGA1 (Modular Industrial Large-scaLE quaNtum computing with trapped IONs, phase 1)

Período documentado: 2023-03-01 hasta 2024-08-31

Resumen del contexto y de los objetivos generales del proyecto

Our goal is to create a stable and structured partnership that will enable an ion-trap quantum computer (QC) platform controlling 100 qubits in the first phase, that can be directly scaled to 1000 qubits in the second phase. We will thus realise a quantum computing demonstrator

a. that is based on scalable ion traps, building upon modular fabrication processes and integrated control electronics and optics,
b. that is controlled by a holistic firmware stack, spanning the entire range from the quantum processor to standardised interfaces and software development kits,
c. whose operations are characterised and continuously monitored, using scalable verification and validation procedures,
d. that is able to routinely operate within the quantum advantage regime - providing computational capabilities that go beyond classical computing power, and
e. that is accessible for collaborations and use-cases via the cloud, and is integrated in high-performance computing (HPC) facilities or data centres for executing hybrid computing algorithms.

Within the flagship ramp-up project AQTION (GA No. 820495), the core of this FPA consortium members have successfully worked together and realised the first 19’’-rack-mounted quantum computing prototype capable of working with up to 50 qubits and pioneered a software stack with connection to HPC. We will now exploit the acquired expertise and developed technologies to take a step forward, and push towards a scalable 1000-qubit device.

Trabajo realizado desde el comienzo del proyecto hasta el final del período abarcado por el informe y los principales resultados hasta la fecha

We will address the following three challenges for hardware development: (1) to scale up the number of qubits with the goal of controlling 1000 qubits in a fault-tolerant manner - both in terms of the necessary gate fidelities lying below specific thresholds and the use of quantum circuits according to fault-tolerant designs that take into account native gate sets and errors; (2) to scale down the quantum processor footprint by adopting fabrication processes that are reproducible and modular, including the direct integration of fibre optics and electronics using techniques adapted from the semiconductor industry, and (3) to scale out by ion-transport operations, and by preparing interfaces to connect different processors, both within a vacuum chamber (multi-core processors) and between individual devices (following design principles of HPC clusters).

Avances que van más allá del estado de la técnica e impacto potencial esperado (incluida la repercusión socioeconómica y las implicaciones sociales más amplias del proyecto hasta la fecha)

In contrast to superconducting systems, ion-trap-based quantum technologies have already demonstrated full 24-qubit entanglement [pog21] without error mitigation or post-selection, and the first universal and fault-tolerant gate set for logical qubits [pos22] within the AQTION device, as well as implemented quantum simulations with up to 51 qubits [jos21]. Recent use-cases demonstrated by members of the consortium include finance applications and risk assessment [san22, gui21], and random number generation [for21]. Other entities focusing on ion-trap quantum computing, such as Quantinuum (formerly Honeywell) and IonQ, have released data with about 10 qubits [rya21, rya22] achieving only logical gates within the Clifford group [rya22] already shown in the universal gate set of [pos22]. This demonstrates the opportunity for Europe to remain in the lead, retaining the sovereignty in trapped-ion approaches for scalable quantum computing. Quantinuum has demonstrated a quantum volume of 8192, the largest volume reported so far, which highlights the competitiveness of the ion-trap platform.

MILLENION addresses these competitive challenges with a clear development path and introduces a step-change in scalability for the full stack of a trapped ion QC, thereby demonstrating the ambition to reach excellence in order to maintain the European leadership in ion-trap-based quantum technologies and push them towards the final technological readiness levels.

Ion arrangement: 2D arrays of traps used for quantum information processing (QIP) with more than 100 qubits
Vacuum: Cryogenic XHV system in a rack; vacuum-tight packaging solutions
Control electronics for shuttling: Integrated and scalable electronics for DC shuttling control that can operate at cryogenic temperature (4 K) and XHV
Light delivery: Integrated solutions for ion addressing in 2D arrays
Trap socket: De facto European-standard for electrical and thermal connections
Lasery supply system: Scalable laser supply system with hands-free 24/7 operation
Quantum gate compiler: Noise-aware approximate compiler which supports gate and transport operations on a 2D array; and includes fault-tolerant circuit design
Execution environment: Automated tune-up of all quantum functionalities, including scalable multi-qubit gate tune-up and in-sequence measurements, targeting 24/7 operation of a quantum processor at fault-tolerant performance levels, and directly supporting a quantum-processor firmware interface
Quantum advantage demonstration: Scalable extension of quantum verification and validation routines and applications aiming at 100 qubits that are executable in a HPC environment.
Quantum device resource management: Parallel execution of small circuits on larger quantum registers, e.g. for scalable and parallel operation of firmware protocols for quantum error suppression and correction
Cloud/HPC interface: Cloud access via quantum software development kits, and interfacing with a HPC infrastructure via system software-level interfaces, creation of an offload environment