Project description
Innovating 3D-stacked AI inference chips to deploy multibillion-parameter LLMs on edge devices
Large language models (LLMs) often comprise billions of parameters, and running them in edge devices limits the chip size. As LLMs continue growing in parameter size and complexity, current technologies will not be able to support them. To address this, the EIC-funded Aloe AI project aims to develop a 3D-stacked AI inference chip that incorporates LLMs on a tiny footprint. To do so, it will use novel semiconductor technology that is based on a capacitive approach and demonstrates a fundamentally superior signal-to-noise ratio necessary to achieve energy efficiency without overheating. To ensure improved performance, increased storage capacity and reduced costs, the compute layers are stacked in the semiconductor based on the 3D NAND flash approach.
Objective
Large Language Models (LLMs) are at the center of the roadmaps of almost all large tech companies for new features in electronic devices. However, they usually consists of billions of parameter and running them outside the cloud in edge devices limits the chip size often to less than a square centimetre of silicon and less than 1 W continuous power consumption amongst other criteria. Current technologies not just fail to provide these technical features but also lack of the potential to meet these requirements in the future. This includes digital hardware (energy in-efficiency) as well as new compute paradigms (e.g. in-memory computing) that can only run models of few million parameters on such a small footprint. Instead of the expensive and limited technology node scaling, SEMRON is working on a 3D scaled AI inference chip to incorporate LLMs on a tiny footprint without overheating. This is enabled by a new semiconductor technology that was already tested (CapRAM). CapRAM is utilising a capacitive approach instead of the resistive approaches known in other in-memory computing approaches. This approach shows an inherently better signal-to-noise ratio that is necessary to achieve the energy-efficiency that is required to not run into overheating issues when increasing the compute density (3D). With monolithic growth the compute layers are stacked in the semiconductor manufacturing process based on the matured 3D NAND flash approach. This not just provides the ability to stack hundreds of compute layers but also to decrease the costs per performance ratio by two orders of magnitude. SEMRON is building the demonstrator of such monolithically grown 3D AI inference chip based on the CapRAM technology that itself already constitutes a superior AI solution for edge devices.
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Project’s keywords as indicated by the project coordinator. Not to be confused with the EuroSciVoc taxonomy (Fields of science)
Programme(s)
Multi-annual funding programmes that define the EU’s priorities for research and innovation.
Multi-annual funding programmes that define the EU’s priorities for research and innovation.
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HORIZON.3.1 - The European Innovation Council (EIC)
MAIN PROGRAMME
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Topic(s)
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Calls for proposals are divided into topics. A topic defines a specific subject or area for which applicants can submit proposals. The description of a topic comprises its specific scope and the expected impact of the funded project.
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Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.
HORIZON-EIC-ACC - HORIZON EIC Accelerator
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Call for proposal
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Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.
(opens in new window) HORIZON-EIC-2024-ACCELERATOR-02
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01067 DRESDEN
Germany
The organization defined itself as SME (small and medium-sized enterprise) at the time the Grant Agreement was signed.
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