Accelerating Datacentre performance through Memory Chips to efficiently manage the Big Data Age

Project Information

ENERGIA/PIM

Grant agreement ID: 190141232

DOI

10.3030/190141232

Project closed

EC signature date 22 April 2022

Start date 1 March 2022

End date 29 February 2024

Funded under

• The European Innovation Council (EIC)

Total cost

€ 3 566 042,50

EU contribution

€ 2 496 229,75

Coordinated by

SAS UPMEM
France

Periodic Reporting for period 2 - ENERGIA/PIM (Accelerating Datacentre performance through Memory Chips to efficiently manage the Big Data Age)

Reporting period: 2022-12-01 to 2024-02-29

Summary of the context and overall objectives of the project

UPMEM has developed a ground-breaking semiconductor-based intelligent memory product for servers, which provides by far the best performing compute solution for big data and Artificial Intelligence applications. Through creating Processing-In-Memory (PIM) technology, UPMEM bypasses structural bottlenecks inherent within existing server architecture, which remain the root cause of Central Processing Unit (CPU) slowdown and low usage rates. By performing calculations in memory where the data resides, PIM eliminates the need to continually move data between the CPU and memory, a highly inefficient process that absorbs 80% of the energy consumption within respective computing nodes. The power of UPMEM’s technology comes from leveraging existing industry protocols and programming languages and designing PIM modules that fit into standardized server memory slots. When compared to those using conventional memory, PIM equipped servers have proven to be up to 20x faster, 12x more efficient and 10x cheaper.

Work performed from the beginning of the project to the end of the period covered by the report and main results achieved so far

UPMEM team had conducted the design works of its new Processing In Memory chip and architecture to provide the main building block of its ultra efficient semiconductor based accelerator for big data and AI.
The team has designed: new enhanced chip interface, new low power processor pipeline, new repair and protection features, new scheme to boot as standard memory, new security scheme to make PIM elements secure enclaves...
The team has designed the associated control software for boot, run and secure modes based on the architecture. As well as a first enhanced version of the module to support those new chips.
The team also worked with prime server partners (Intel, QCT, Supermicro) to prepare the server integration of the Processing In Memory solution on the latest server platforms.
UPMEM team has continued to develop new use cases with international commercial and research labs with its first generation scheme to nurture the specification of the new Processing In Memory chip, architecture and software.

Progress beyond the state of the art and expected potential impact (including the socio-economic impact and the wider societal implications of the project so far)

Not applicable.