Objective
The goal of this project was the integration of new-generation reprogrammable, read-only memory devices (both EPROM and EEPROM) for the application-specific IC (ASIC) market into:
- one-micron and low-voltage (1.5 V, 2 micron design rule) CMOS (in the first phase of the project)
- 0.8 micron and low-voltage (1.5 V, 1.5 micron design rule) CMOS (in the second phase).
The goal of the project is the integration of new generation reprogrammable, read only memory devices (both erasable programmable read only memory (EPROM) and (EEPROM)) into 1 micron and low voltage (1.5 V, 2 micron design rule) complementary metal oxide semiconductor (CMOS) and 0.8 micron and low voltage (1.5 V, 1.5 micron design rule) CMOS for the application specific integrated circuit (ASIC) market. During the second phase of the project, major emphasis is being placed on the integration of flash EEPROM, particularly by silicon technology (ST).
The effect of cell size reduction, layout and processing options on cell performance have been evaluated. Concerning the processing, particular attention has been given to the impact on the cells of the implementation of both EPROM and EEPROM in the basic CMOS process. With respect to cell architecture, the most promising ones include the split gate cell with enhanced injection, and the trench gate oxide cell. The work on computer aided design (CAD) tools and cell library has included the generation of a power distribution checker, the investigation of automatic layout tools for electrically reconfiguarable logic arrays, and the development of EPROM and EEPROM generators allowing the maximum modularity in terms of number of bits and number of words.
The demonstrators, most of which are now in the advanced testing/qualification phase, include:
a 10K gate array incorporating 2K EEPROM;
16K EEPROM parameterizable block embedded in a 50K gate array;
an 8-bit microcontroller incorporating both EPROM (48K) and EEPROM (1 to 2K) for automotive applications;
a low power low voltage integrated circuit (IC) for identification applications;
a low power low voltage IC for identification of cargo containers;
an intelligent battery charger for optimum nickel cadmium battery life;
an IC for the personalization of electrical power meters;
an IC for use insmart cards;
an IC for music electronics.
Finally, 2 technologies d eveloped by ST have been transferred to production to make microcontrollers with embedded memory for applications including credit cards, pay television, computer peripherals, and in the growing automotive market. 2 additional processes are in the preproduction phase for, for example, gate arrays, identification ICs and microcontrollers.
At the start of the project the availability of cell libraries and CAD tools for non-volatile memory was quite limited. One of the main objectives of the project has thus been the development of cell libraries for EPROM and EEPROM blocks and distributed memory, together with all the support circuitry, such as decoders, sense amplifiers, high voltage generators, etc. CAD tools to design and correctly match memory blocks of arbitrary size had also to be developed, as well as routing tools to handle the special high voltage requirements.
Fields of science (EuroSciVoc)
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques. See: The European Science Vocabulary.
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques. See: The European Science Vocabulary.
- natural sciences chemical sciences inorganic chemistry inorganic compounds
- natural sciences chemical sciences inorganic chemistry transition metals
- natural sciences physical sciences electromagnetism and electronics semiconductivity
- natural sciences chemical sciences inorganic chemistry metalloids
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Programme(s)
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Coordinator
NN12 8EQ Towcester
United Kingdom
The total costs incurred by this organisation to participate in the project, including direct and indirect costs. This amount is a subset of the overall project budget.