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Content archived on 2024-06-18

Automatic Hardware Generation Using the Stream Programming Paradigm

Objective

Electronic System Level (ESL) design is an emerging semiconductor design and verification methodology that focuses on higher levels of abstraction to describe the functionality of a platform system. Elevating the abstraction level closer to the application and away from the implementation details is becoming a vital step for rapid prototyping and productization of complex System on Chips (SoCs). The main promise of the ESL methodology is to enable the developers to focus on the important aspects of their application, and to open up platform design to software and algorithm developers that do not necessarily have hardware and architectural expertise. Unfortunately, the ESL vision remains unfulfilled mainly due to the lack of an acceptable abstraction layer among the researchers and the potential users of ESL tools. The lack of such a common language creates a lack of understanding between designers at different levels, unnecessary replication of tasks, potential for erroneous system functionality, and market fragmentation. We believe that a successful ESL abstraction should provide semantics to express “spatial computation” and should share a lot of common elements with parallel programming for multi-core or many-core engines. In this work, we introduce the stream programming paradigm as an ESL abstraction, and we propose the design and implementation of an ESL tool that generates synthesizable hardware based on this paradigm. The streaming programming paradigm is an emerging embedded domain in which an application can be viewed as a collection of independent kernel computations that communicate over explicit data channels.

Fields of science (EuroSciVoc)

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Keywords

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Topic(s)

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Call for proposal

Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.

FP7-PEOPLE-2007-4-3-IRG
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Funding Scheme

Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.

MC-IRG - International Re-integration Grants (IRG)

Coordinator

PANEPISTIMIO THESSALIAS
EU contribution
€ 100 000,00
Address
ARGONAFTON FILELLINON
38 221 VOLOS
Greece

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Region
Κεντρική Ελλάδα Θεσσαλία Μαγνησία
Activity type
Higher or Secondary Education Establishments
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Total cost

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