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Validation of European high capacity rad-hard FPGA and software tools

Periodic Reporting for period 2 - VEGAS (Validation of European high capacity rad-hard FPGA and software tools)

Reporting period: 2017-01-01 to 2019-06-30

Project VEGAS proposes to address this key challenge of European non-dependence and competitiveness regarding rad-hard FPGA for space applications. VEGAS will evaluate (following ESCC rules) and validate the first rad-hard FPGA in 65nm to directly compete with the US offering and reach TRL 7.
The proposed activity is part of a jointly agreed space FPGA roadmap between EU, the European Space Agency, the CNES and the key European space equipment manufacturers. It is supporting the Strategic Research Agenda of the European Space Technology Platform through various objectives such as:
• Preparing and enabling future European space programmes,
• Supporting the industry competitiveness (short term/time to market),
• Guaranteeing European technology independence,
• Fostering technology transfer
The proposed activities allow addressing applications beyond the space market such as avionic, energy and transport. These markets are close to the space market in terms of reliability and performance requirements and can be derived from the proposed development in a short time frame.
VEGAS offers a Key Enabling Technology to the European space industry. VEGAS will offer European space agencies and major customers the state-of-the-art components they need without having to worry about exportation regulations. Additional markets beyond aerospace will also be addressed. The main goal of VEGAS is indeed to validate and ESCC evaluate a rad-hard FPGA and associated CAD tools by integrating all the enabling design and manufacturing technologies needed to deliver high reliability, radiation-hardened integrated circuits. Our rad-hard FPGA will benefit from the most advanced space qualified technologies including 65nm ST librairy, flip chip assembly, large hermetic package etc.
The first ambition of VEGAS is to offer Europe new advanced rad-hard FPGA for space applications but also to serve additional markets sharing some harsh environment and high reliability requirements.
Due to BRAVE delay to release the NG-MEDIUM evaluation kit and software tools including timing constraints, many tasks have been delayed. All activities will start in 2017 and should be completed within the 36 months project duration. Below a summary of each R&D workpackage activity:
• WP1: TAS-F, AD-F and AD-G have prepared some benchmarks and set up the beta version of NanoXmap to be ready by March 2017 for the official release of the NG-MEDIUM evaluation kit and NanoXmap.
• WP2: NX and TAS-E have done two radiative test campaigns on the NG-MEDIUM. US and PT has set up NanoXmap.
• WP3: NX has significantly improved NanoXmap synthesis and place and route optimization based on end users feedback. Timing constraints are still in development and should be available in March 2017.
• WP4: ST started the preparation of the QML-V 1 lot qualification. First stage being the preparation of the industrial test solution that will support this qualification. ST started and completed the development of the Test Hardware for Wafer Sort testing. Ongoing debug of the test patterns, with the support from NX in the test pattern generation. Test pattern generation flow is now validated on the very first test patterns up to test on silicon. Next test patterns are under generation and debugging.
The two FPGA used in VEGAS will go beyond current state of the art and will be very competitive. The NG-FPGA-MEDIUM will directly compete with the RTAX 2000 and RTAX 4000 with a clear advantage of being fully reprogrammable and having advanced features such as dynamic partial reconfiguration or automatic internal scrubbing. The NG-FPGA-LARGE will compete with the Virtex 5QV from Xilinx and the upcoming RTG4 from Microsemi. The NG-FPGA-LARGE will have a better resilience to SEU than the Virtex 5QV and more additional features than the RTG4 such as Dynamic Partial Reconfiguration.

VEGAS will have the following impacts:
• Reduce the dependence on critical technologies and capabilities from outside Europe for future space applications by providing an ITAR free advanced rad-hard FPGA
• Develop or regain in the mid-term the European capacity to operate independently in space with access to new generation of rad-hard FPGA beyond current state of the art
• Enhance the technical capabilities and overall competitiveness of European space industry satellite vendors on the worldwide market by giving prime access to exportation restriction free high performance technologies
• Work package dedicated to the development of a commercial evaluation of the technology with a full range of recurring products. The future rad-hard FPGA will be available in space qualified package and commercial package with a clear pricing strategy to maximise product dissemination outside space markets
• Improve the overall European space technology landscape and complement the activities of European and national space programmes. VEGAS is clearly set up to complement the ongoing ESA/CNES BRAVE project
• VEGAS will have clear social and evironmental impacts by offering a very versatile technology able to meet multiple applications in various markets with the same device. It will also facilitate SMEs access to advance space applications

VEGAS will give the possibility for Europe to have free, unrestricted access to advanced rad-hard FPGA for space technology. VEGAS FPGA will meet all technology requirements specified in the Excerpt from Critical Space Technologies for European Strategic Non-Dependence List of Urgent Actions for 2012/2013 published in June 2014. Therefore VEGAS is fully compliant regarding rad-hard FPGA with the list of urgent actions for Critical Space Technologies for European Strategic Non-Dependence for the time-frame of 2012-2013.

VEGAS will give access to European space industry to the most advanced rad-hard FPGA devices without any exportation restriction. These new rad-hard FPGA will also offer unique SEE mitigation techniques and advanced features such as DPS or high speed buses. As described in the chart below, rad-hard FPGA are commonly used in satellites and these new devices will have a significant impact on future space application performance. It is even more the case for European satellite vendors which are often limited with ITAR free technologies. VEGAS is expected to have a clear impact on European space industry by improving European satellite vendors’ competiveness. VEGAS will also improve space technology dissemination to SMEs by offering a cheaper technology than advanced ASIC development. Indeed, advanced FPGA like NG-FPGA-MEDIUM and NG-FPGA-LARGE can be used instead of many ASIC which significantly reduces NRE associated to new application development.
Article republished by IEEE online magazine about technology transfer in the electronics sector