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WCET-Aware Parallelization of Model-Based Applications for Heterogeneous Parallel Systems

Deliverables

WCET-aware multi-core programming model (Rev. 1)

This report describes the programming model that is needed to develop applications that can be executed on the platforms.

State-of-the-art for WCET-aware optimization for heterogeneous multi-core architectures

This report will summarize the state-of-the-art for all important tasks covered within ARGO: model-based design, WCET analysis, heterogeneous multi-core architectures and toolchains to support a better programmability of said platforms.

Test case demonstration and evaluation report (first increment)

The report will present the evaluation results for the first iteration of the ARGO approach based on the results of the first iteration application test cases. The strengths and pitfalls of the tools and the methodology will be documented with regard to the first time user experience. The results will be used in WP3 and WP5 as user input.

WCET-aware multi-core programming model (Rev. 2)

This report describes the programming model that is needed to develop applications that can be executed on the platforms.

Specification of a WCET-aware abstract architecture description

This deliverable provides the specification of an abstract architecture description enabling both the platform-agnostic parallelization as well as code- and system-level WCET analysis.

Test case demonstration and evaluation report (second increment)

The report will introduce the results of the demonstration and the final evaluation of the ARGO approach. It will reflect the experience of the design and development of full functional test cases.

End-user guidelines for modelbased design (Rev. 2)

The report will provide end-user guidelines for application development in the model-based design environment. This includes the real-time constraints for WCET-analysis as well as the platform-specific constraints.

End-user guidelines for model-based design (Rev. 1)

The report will provide end-user guidelines for application development in the model-based design environment. This includes the real-time constraints for WCET-analysis as well as the platform-specific constraints.

Project website

The project website will be used for project promotion, public and scientific dissemination. It will be continuously updated during the project.

Final workshop

At the end of the project, a workshop will be organized demonstrating all the ARGO approach. The intended audience in scientific as well as non-scientific (e.g. press). The workshop might be part of a larger conference.

ATOMS module for frontend demonstrator directly downloadable from Scilab

Scilab users can download directly from the software modules for specific application domain. Scilab Enterprises will issue a module with the frontend tool at M24.

Publications

Using polyhedral techniques to tighten WCET estimates of optimized code: A case study with array contraction

Author(s): Thomas Lefeuvre, Imen Fassi, Christoph Cullmann, Gernot Gebhard, Emin Koray Kasnakli, Isabelle Puaut, Steven Derrien
Published in: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Page(s) 925-930
DOI: 10.23919/DATE.2018.8342142

A WCET-aware parallel programming model for predictability enhanced multi-core architectures

Author(s): Simon Reder, Leonard Masing, Harald Bucher, Timon ter Braak, Timo Stripf, Jurgen Becker
Published in: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Page(s) 943-948
DOI: 10.23919/date.2018.8342145

Fine-Grain Iterative Compilation for WCET Estimation

Author(s): Isabelle Puaut, Mickael Dardaillon, Christoph Cullmann, Gernot Gebhard, Steven Derrien
Published in: 18th International Workshop on Worst-Case Execution Time Analysis (WCET 2018), Issue 9:1-9:12, 2018
DOI: 10.4230/oasics.wcet.2018.9

Quantifying WCET reduction of parallel applications by introducing slack time to limit resource contention

Author(s): Sébastien Martinez, Damien Hardy, Isabelle Puaut
Published in: Proceedings of the 25th International Conference on Real-Time Networks and Systems - RTNS '17, 2017, Page(s) 188-197
DOI: 10.1145/3139258.3139263

Cache-Conscious Offline Real-Time Task Scheduling for Multi-Core Processors

Author(s): Nguyen, Viet Anh; Hardy, Damien ; Puaut, Isabelle
Published in: 29th Euromicro Conference on Real-Time Systems (ECRTS 2017), 2017, Page(s) 14:1-14:22
DOI: 10.4230/lipics.ecrts.2017.14

Simulation-based Verification for Parallelization of Model-based Applications

Author(s): Claus B. Koch, Umut Durak and David Müller
Published in: Proceedings of the 50th Computer Simulation Conference, 2018, Page(s) 10:1-10:10

Modeling and Simulation Based Development of an Enhanced Ground Proximity Warning System for Multicore Targets

Author(s): Umut Durak, David Müller, Florian Möcke and Claus B. Koch
Published in: Proceedings of the Model-driven Approaches for Simulation Engineering Symposium (Mod4Sim '18), 2018, Page(s) 4:1-4:12

Enhanced Functions for a Parallel Multicore Ground Proximity Warning System

Author(s): David Mueller, Umut Durak
Published in: 2018 IEEE/AIAA 37th Digital Avionics Systems Conference (DASC), 2018, Page(s) 1-7
DOI: 10.1109/dasc.2018.8569446

Tightening contention delays while scheduling parallel applications on multi-core architectures

Author(s): Benjamin Rouxel, Steven Derrien, Isabelle Puaut
Published in: International Conference on Embedded Software (EMSOFT), 2017. October 2017., 2017

WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach

Author(s): Steven Derrien, Isabelle Puaut, Panayiotis Alefragis, Marcus Bednara, Harald Bucher, Clement David, Yann Debray, Umut Durak, Imen Fassi, Christian Ferdinand, Damien Hardy, Angeliki Kritikakou, Gerard Rauwerda, Simon Reder, Martin Sicks, Timo Stripf, Kim Sunesen, Timon ter Braak, Nikolaos Voros, Jurgen Becker
Published in: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 2017, Page(s) 286-289
DOI: 10.23919/DATE.2017.7927000

Task Graph Mapping and Scheduling on Heterogeneous Architectures Under Communication Constraints

Author(s): Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikolaos Voros
Published in: International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVII), 2017

A hybrid approach for mapping and scheduling on heterogeneous multicore systems

Author(s): A. Emeretlis, G. Theodoridis, P. Alefragis, N. Voros
Published in: 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), 2016, Page(s) 360-365
DOI: 10.1109/SAMOS.2016.7818373

Model-based Development of Enhanced Ground Proximity Warning System for Heterogeneous Multi-Core Architectures

Author(s): U. Durak, D. Müller, J. Becker, N.S. Voros, P. Alefragis, T. Stripf, P. Agnel, G.Rauwerda, K.Sunensen
Published in: 23.Symposium Simulationstechnik (ASIM 2016), 2016

Cache Partitioning + Loop Tiling: A Methodology for Effective Shared Cache Management

Author(s): Vasilios Kelefouras, Georgios Keramidas, Nikolaos Voros
Published in: 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2017, Page(s) 477-482
DOI: 10.1109/ISVLSI.2017.89

Improvements of a hybrid ILP-CP Benders decomposition for mapping and scheduling task DAGs on heterogeneous architectures

Author(s): Emeretlis, Andreas and Theodoridis, George and Alefragis, Panayiotis and Voros, Nikolaos
Published in: Proceedings of the 11th International Conference of the Practice and Theory of Automated Timetabling (PATAT 2016), 2016, Page(s) 477-479

Advances in Aeronautical Informatics

Author(s): Umut Durak, Jürgen Becker, Sven Hartmann, Nikolaos S. Voros
Published in: 2018
DOI: 10.1007/978-3-319-75058-3

Mapping and Scheduling Hard Real Time Applications on Multicore Systems - The ARGO Approach

Author(s): Panayiotis Alefragis, George Theodoridis, Merkourios Katsimpris, Christos Valouxis, Christos Gogos, George Goulas, Nikolaos Voros, Simon Reder, Koray Kasnakli, Marcus Bednara, David Müller, Umut Durak, Juergen Becker
Published in: Applied Reconfigurable Computing. Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Santorini, Greece, May 2-4, 2018, Proceedings, Issue 10824, 2018, Page(s) 700-711
DOI: 10.1007/978-3-319-78890-6_56