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CORDIS - Resultados de investigaciones de la UE
CORDIS

WCET-Aware Parallelization of Model-Based Applications for Heterogeneous Parallel Systems

CORDIS proporciona enlaces a los documentos públicos y las publicaciones de los proyectos de los programas marco HORIZONTE.

Los enlaces a los documentos y las publicaciones de los proyectos del Séptimo Programa Marco, así como los enlaces a algunos tipos de resultados específicos, como conjuntos de datos y «software», se obtienen dinámicamente de OpenAIRE .

Resultado final

WCET-aware multi-core programming model (Rev. 1) (se abrirá en una nueva ventana)

This report describes the programming model that is needed to develop applications that can be executed on the platforms.

State-of-the-art for WCET-aware optimization for heterogeneous multi-core architectures (se abrirá en una nueva ventana)

This report will summarize the state-of-the-art for all important tasks covered within ARGO: model-based design, WCET analysis, heterogeneous multi-core architectures and toolchains to support a better programmability of said platforms.

Test case demonstration and evaluation report (first increment) (se abrirá en una nueva ventana)

The report will present the evaluation results for the first iteration of the ARGO approach based on the results of the first iteration application test cases. The strengths and pitfalls of the tools and the methodology will be documented with regard to the first time user experience. The results will be used in WP3 and WP5 as user input.

WCET-aware multi-core programming model (Rev. 2) (se abrirá en una nueva ventana)

This report describes the programming model that is needed to develop applications that can be executed on the platforms.

Specification of a WCET-aware abstract architecture description (se abrirá en una nueva ventana)

This deliverable provides the specification of an abstract architecture description enabling both the platform-agnostic parallelization as well as code- and system-level WCET analysis.

Test case demonstration and evaluation report (second increment) (se abrirá en una nueva ventana)

The report will introduce the results of the demonstration and the final evaluation of the ARGO approach. It will reflect the experience of the design and development of full functional test cases.

End-user guidelines for modelbased design (Rev. 2) (se abrirá en una nueva ventana)

The report will provide end-user guidelines for application development in the model-based design environment. This includes the real-time constraints for WCET-analysis as well as the platform-specific constraints.

End-user guidelines for model-based design (Rev. 1) (se abrirá en una nueva ventana)

The report will provide end-user guidelines for application development in the model-based design environment. This includes the real-time constraints for WCET-analysis as well as the platform-specific constraints.

Project website (se abrirá en una nueva ventana)

The project website will be used for project promotion, public and scientific dissemination. It will be continuously updated during the project.

Final workshop (se abrirá en una nueva ventana)

At the end of the project, a workshop will be organized demonstrating all the ARGO approach. The intended audience in scientific as well as non-scientific (e.g. press). The workshop might be part of a larger conference.

ATOMS module for frontend demonstrator directly downloadable from Scilab (se abrirá en una nueva ventana)

Scilab users can download directly from the software modules for specific application domain. Scilab Enterprises will issue a module with the frontend tool at M24.

Publicaciones

Using polyhedral techniques to tighten WCET estimates of optimized code: A case study with array contraction (se abrirá en una nueva ventana)

Autores: Thomas Lefeuvre, Imen Fassi, Christoph Cullmann, Gernot Gebhard, Emin Koray Kasnakli, Isabelle Puaut, Steven Derrien
Publicado en: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Página(s) 925-930, ISBN 978-3-9819263-0-9
Editor: IEEE
DOI: 10.23919/DATE.2018.8342142

A WCET-aware parallel programming model for predictability enhanced multi-core architectures (se abrirá en una nueva ventana)

Autores: Simon Reder, Leonard Masing, Harald Bucher, Timon ter Braak, Timo Stripf, Jurgen Becker
Publicado en: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Página(s) 943-948, ISBN 978-3-9819263-0-9
Editor: IEEE
DOI: 10.23919/date.2018.8342145

Fine-Grain Iterative Compilation for WCET Estimation (se abrirá en una nueva ventana)

Autores: Isabelle Puaut, Mickael Dardaillon, Christoph Cullmann, Gernot Gebhard, Steven Derrien
Publicado en: 18th International Workshop on Worst-Case Execution Time Analysis (WCET 2018), Edición 9:1-9:12, 2018
Editor: Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik
DOI: 10.4230/oasics.wcet.2018.9

Quantifying WCET reduction of parallel applications by introducing slack time to limit resource contention (se abrirá en una nueva ventana)

Autores: Sébastien Martinez, Damien Hardy, Isabelle Puaut
Publicado en: Proceedings of the 25th International Conference on Real-Time Networks and Systems - RTNS '17, 2017, Página(s) 188-197, ISBN 9781450352864
Editor: ACM Press
DOI: 10.1145/3139258.3139263

Cache-Conscious Offline Real-Time Task Scheduling for Multi-Core Processors (se abrirá en una nueva ventana)

Autores: Nguyen, Viet Anh; Hardy, Damien ; Puaut, Isabelle
Publicado en: 29th Euromicro Conference on Real-Time Systems (ECRTS 2017), 2017, Página(s) 14:1-14:22, ISBN 978-3-95977-037-8
Editor: Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik
DOI: 10.4230/lipics.ecrts.2017.14

Simulation-based Verification for Parallelization of Model-based Applications

Autores: Claus B. Koch, Umut Durak and David Müller
Publicado en: Proceedings of the 50th Computer Simulation Conference, 2018, Página(s) 10:1-10:10
Editor: Society for Computer Simulation International

Modeling and Simulation Based Development of an Enhanced Ground Proximity Warning System for Multicore Targets

Autores: Umut Durak, David Müller, Florian Möcke and Claus B. Koch
Publicado en: Proceedings of the Model-driven Approaches for Simulation Engineering Symposium (Mod4Sim '18), 2018, Página(s) 4:1-4:12
Editor: Society for Computer Simulation International

Enhanced Functions for a Parallel Multicore Ground Proximity Warning System (se abrirá en una nueva ventana)

Autores: David Mueller, Umut Durak
Publicado en: 2018 IEEE/AIAA 37th Digital Avionics Systems Conference (DASC), 2018, Página(s) 1-7, ISBN 978-1-5386-4112-5
Editor: IEEE
DOI: 10.1109/dasc.2018.8569446

Tightening contention delays while scheduling parallel applications on multi-core architectures

Autores: Benjamin Rouxel, Steven Derrien, Isabelle Puaut
Publicado en: International Conference on Embedded Software (EMSOFT), 2017. October 2017., 2017
Editor: ACM

WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach (se abrirá en una nueva ventana)

Autores: Steven Derrien, Isabelle Puaut, Panayiotis Alefragis, Marcus Bednara, Harald Bucher, Clement David, Yann Debray, Umut Durak, Imen Fassi, Christian Ferdinand, Damien Hardy, Angeliki Kritikakou, Gerard Rauwerda, Simon Reder, Martin Sicks, Timo Stripf, Kim Sunesen, Timon ter Braak, Nikolaos Voros, Jurgen Becker
Publicado en: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 2017, Página(s) 286-289, ISBN 978-3-9815370-8-6
Editor: IEEE
DOI: 10.23919/DATE.2017.7927000

Task Graph Mapping and Scheduling on Heterogeneous Architectures Under Communication Constraints

Autores: Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikolaos Voros
Publicado en: International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVII), 2017
Editor: IEEE

A hybrid approach for mapping and scheduling on heterogeneous multicore systems (se abrirá en una nueva ventana)

Autores: A. Emeretlis, G. Theodoridis, P. Alefragis, N. Voros
Publicado en: 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), 2016, Página(s) 360-365, ISBN 978-1-5090-3076-7
Editor: IEEE
DOI: 10.1109/SAMOS.2016.7818373

Model-based Development of Enhanced Ground Proximity Warning System for Heterogeneous Multi-Core Architectures

Autores: U. Durak, D. Müller, J. Becker, N.S. Voros, P. Alefragis, T. Stripf, P. Agnel, G.Rauwerda, K.Sunensen
Publicado en: 23.Symposium Simulationstechnik (ASIM 2016), 2016
Editor: DLR

Cache Partitioning + Loop Tiling: A Methodology for Effective Shared Cache Management (se abrirá en una nueva ventana)

Autores: Vasilios Kelefouras, Georgios Keramidas, Nikolaos Voros
Publicado en: 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2017, Página(s) 477-482, ISBN 978-1-5090-6762-6
Editor: IEEE
DOI: 10.1109/ISVLSI.2017.89

Improvements of a hybrid ILP-CP Benders decomposition for mapping and scheduling task DAGs on heterogeneous architectures

Autores: Emeretlis, Andreas and Theodoridis, George and Alefragis, Panayiotis and Voros, Nikolaos
Publicado en: Proceedings of the 11th International Conference of the Practice and Theory of Automated Timetabling (PATAT 2016), 2016, Página(s) 477-479, ISBN 978-0-9929984-1-7
Editor: PATAT

Advances in Aeronautical Informatics (se abrirá en una nueva ventana)

Autores: Umut Durak, Jürgen Becker, Sven Hartmann, Nikolaos S. Voros
Publicado en: 2018, ISBN 978-3-319-75058-3
Editor: Springer
DOI: 10.1007/978-3-319-75058-3

Mapping and Scheduling Hard Real Time Applications on Multicore Systems - The ARGO Approach (se abrirá en una nueva ventana)

Autores: Panayiotis Alefragis, George Theodoridis, Merkourios Katsimpris, Christos Valouxis, Christos Gogos, George Goulas, Nikolaos Voros, Simon Reder, Koray Kasnakli, Marcus Bednara, David Müller, Umut Durak, Juergen Becker
Publicado en: Applied Reconfigurable Computing. Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Santorini, Greece, May 2-4, 2018, Proceedings, Edición 10824, 2018, Página(s) 700-711, ISBN 978-3-319-78889-0
Editor: Springer International Publishing
DOI: 10.1007/978-3-319-78890-6_56

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