STREAMS project has made significant progress during the last 2nd period and has achieved significant objectives with respect to its constituent technology blocks, system level architectures and its envisaged transceiver and routing demonstrators. Some small time-delays on the Si-photonic PIC fabrication and the board-level assemblies mainly due to the MPW run schedules have been successfully
absorbed with the project’s extension to 42 months that was decided after the first review meeting. Fabrication challenges have been experienced in the successful integration of III-V on SOI in-plane lasers and nanoamplifiers and thorough investigation as well as alternative solutions have been sought towards enabling a successful demonstration of the final system-scale interconnect architectures.
All constituent building blocks as well as the complete 8x-optical engine and the board-level routing system have been designed and evaluated, concluding to breakthrough results that are currently defining the state of the art in Si-based 400Gb/s and low-energy transceiver and routing systems for Datacom and computercom applications. More specifically, ICT-STREAMS demonstrated successfully: a) a 4-channel 200Gb/s transceiver sub-assembly comprising a Si-Pho 4-ch transceiver chip wirebonded to a 4-ch driver+TIA circuit and delivering energy consumption of only 4.2 pJ/bit, b) an 8-channel 400Gb/s Si-based transceiver, c) a record bandwidth-distance product transmission of 50Gb/sx52km using its electro-optical Si-based transmitter sub-assembly, d) on-board 8x8 and 16x16 AWGR elements assembled onto an EOPCB, and e) an ICT-STREAMS server blade interconnect for an 8x8 configuration via physical layer simulations, studying the interconnect architecture in two types of operation, namely: any-to-any and broadcasting. This has been based on a novel wavelength detuned transmission scheme for the transmitter interfaces that has been experimentally validated and takes into account the sub-optimal inband cross-talk of the AWGR, enabling in this way all-to-all p2p interconnection and highlighting the roadmap for fully-loaded AWGR-based transmission schemes even with suboptimal crosstalk values. Moreover, a variety of CLIPP devices to serve for the thermal drift compensation system of ICT-STREAMS have been designed and successfully evaluated in the first Silicon PIC active run (A1) so as to steer and hold the photonic stages to the optimal working point and compensate for the predicted severe crosstalk effects among the active components, included in the STREAMS demonstrators. A third run for EOCB (EOCB3) was been scheduled in order to host A2 and P3 silicon chips. The new EOCB3 boards were designed, fabricated and finally released in June 2019. During the last period, more than 55 papers have been accepted in scientific journals, magazines, international conferences and workshops. Finally, ICT-STREAMS consortium has participated in standardization bodies as well as in many events, workshops and exposition promoting the outcomes of the project. The consortium has been constantly monitoring the relevant IPR and the evolution in standards and the detailed exploitation outcomes and exploitation pathways per partner have been updated.
