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Synthesis and Performance Optimization of a Switching Nano-crossbar Computer

Periodic Reporting for period 2 - NANOxCOMP (Synthesis and Performance Optimization of a Switching Nano-crossbar Computer)

Reporting period: 2017-12-01 to 2019-11-30

• What is the problem/issue being addressed?
CMOS transistor dimensions have been shrinking for decades in an almost regular manner. Nowadays this trend has reached a critical point and it is widely accepted that the trend will end in a decade. At this point, research is shifting to novel forms of nanotechnologies including selfassembled systems. Unlike conventional CMOS that can be patterned in complex ways with lithography, self-assembled nanoscale systems generally consist of regular structures. Logical functions and memory elements are achieved with arrays of crossbar-type switches. Here, the problem needed to be solved is “how to make efficient and high performance computing with nano arrays that includes logic synthesis, defect tolerance, and performance optimization?”, and it is the main motivation of this project.

• Why is it important for society?
The main goal of this project is developing a complete synthesis and optimization methodology for switching nano-crossbar arrays that leads to the design and construction of an emerging nanocomputer. New computing models for diode, FET, and four-terminal switch based nanoarrays are developed. The proposed methodology implements both arithmetic and memory elements, necessitated by achieving a computer, by considering performance parameters such as area, delay, power dissipation, and reliability. With combination of arithmetic and memory elements a synchronous state machine (SSM), representation of a computer, is realized. The proposed methodology targets variety of emerging technologies including nanowire/nanotube crossbar arrays, magnetic switch-based structures, and crossbar memories. The results of this project will be a foundation of nano-crossbar based circuit design techniques and greatly contribute to the construction of future and emerging computers beyond CMOS (current conventional computing technology).

• What are the overall objectives?
Research objectives:
The main objective of this project is developing a complete synthesis methodology for nanoscale switching crossbars that leads to the design and construction of an emerging computer. To achieve this objective, we follow a roadmap, with sub-objectives listed below.
First Research Objective: Finding optimal crossbar sizes, modelling, and optimization.
Second Research Objective: Implementing arithmetic and memory elements by considering reliability, area, delay, and power dissipation of the crossbars.
Third Research Objective: Realizing a nano-crossbar based synchronous state machine.

As the conclusion of the action, a complete synthesis methodology for nano-crossbar arrays that considers both technology specifics and performance metrics including reliability, area, delay, and power dissipation, has been achieved. It is shown that any computing device including a state machine can be implemented with the proposed methodology.
The Status of the First Sub-objective: WP1.2 WP1.3 WP2.1 WP2.2 and WP2.3 are directly related with this research objective and cover it. In the first half of the project this first objective was fully achieved, as reported in the first technical report.
Second Research Objective: Implementing arithmetic and memory elements by considering reliability, area, delay, and power dissipation of the crossbars.

The Status of the Second Sub-objective:: WP2.2 WP2.3 are directly and WP1 is partially related with the technology independent part of this objective and these work packages were successfully completed in the first half of the project, as reported in the first technical report. Furthermore WP3 and WP4 form technology dependent part of this second objective. By using technology dependent synthesis methodology developed in WP3, arithmetic and memory elements are implemented in WP4. In the second half of the project, technology dependent part has been successfully completed.

The Status of the Third Sub-objective: Indeed this objective is related to all work packages. In the project the state machine represents a computing system or a computer having arithmetic and memory parts. If one can implement an arbitrary logic function with nano-crossbar arrays, then any circuit block whether arithmetic or memory can be implemented. Motivated by this fact, in WP1 and WP2, we have developed logic synthesis and performance optimization techniques for nano-crossbar arrays. We have applied these techniques to certain technologies in WP3 and WP4. Eventually in WP5, with extended benchmarking and simulations, we have showed that a computing system or a state machine can be successfully implemented with nano-crossbar arrays. Here, especially two different technologies, namely CMOS based swithing lattices and memristive arrays come forward. As a result, we have achieved the third objective as the main outcome of WP5.

Started in 2015, the project has been successfully completed in 2019 with many achievements including:

34 researchers have been seconded to project partners, performing a total of 110,93 secondment months. 17 of them are early stage researchers and 9 of them are female researchers.
28 peer-reviewed published papers (4 more papers accepted, but not published yet) contributed by 30 project secondees or partners. 10 of them are journal papers.
35 dissemination, outreach, and management activities have been performed.
Scientific Excellence: As the main indicator of scientific progress, in the project we have 10 journal papers and 18 conference papers published or accepted to be published in leading journals such as IEEE and ACM journals and conferences such as DATE. These publications are mostly related to the project's ambitious goal of developing a complete synthesis methodology for nano-crossbar arrays, for the first time in the literature. Therefore the related results are novel and beyond the state of the art. We believe that this level of publications is an important success considering that the project’s goal in the proposal is 4 journal and 3 conference papers. Also considering that this project is a strong research project with 12 of its 15 objectives of WP’s are research objectives, publications are expected to be the main criteria for evaluations.

Research to business and industry:
• 9 secondments have been performed to our SME partner IROC. Seconded staff have had a chance to perform active collaboration. Fourjoint papers demonstrate the effectiveness of these secondments.

Career development:
• Quality of research and related publications is the main criteria for career developments in academia. This is valid for all levels starting from graduate students to full professors. Considering that all secondees in this project are from academia and the research conducted is so fruitful with many high quality publications, the project’s help for career development of the project researchers is high.

• Among 34 secondees in the second half of the project, 17 of them are ESRs.

Communication and dissemination activities:
• So far, we get involved in more than 35 activities to introduce our project, including presentations of published conference papers, demonstrations and exhibitions, invited talks, online showcasing in YouTube, national magazine/bulletin column, and several university-wise department meetings/seminars. Also mostly related to the works in the last year of the project, we have 4 accepted conference papers to be presented as well as 2 invited talks in 2020.