Periodic Reporting for period 3 - GaNonCMOS (GaN densily integrated with Si-CMOS for reliable, cost effective high frequency power delivery systems)
Période du rapport: 2019-07-01 au 2021-06-30
The overall objective of the GaNonCMOS project was to develop novel low cost and reliable GaN-based process, components, modules and integration schemes, and demonstrate their performance and economic potential on system level for significant energy reduction in a wide range of energy intensive applications such as data centres and automotive. A key innovation steps was to develop materials, components and processes to integrate GaN power switches with CMOS drivers densely together while guaranteeing long term reliability over the full value chain.
To develop a VRM system level model, this needs to have an optimized power conversion topology. The design of the GaN power switches, the magnetic components and the CMOS driver and control circuits was undertaken and finalized in a second stage.
At the materials level, new magnetic materials and deposition processes for application in high frequency magnetic cores were developed and tested. The epitaxial material to fabricate the GaN switches was successfully developed, fabricated and characterized.
The individual VRMs components were developed at all levels of integration. A functional embedded inductor demonstrator was manufactured and tested for a realistic application. Integrated thin-film Magnetics-on-Silicon (MoS) transformer devices were fabricated using a CMOS back-end-of-line (BEOL) compatible micro-fabrication process. A combined controller/driver IC was developed to adapt to the requirements of the different demonstrators including the chip-level demonstrator for direct wafer bonding. We developed high-power density DC-DC converters based on both monolithically integrated wire-bonded GaN switches and embedded GaN switches. The results suggested that the device design, the GaN epi-wafer quality, the device fabrication, and the converter design are suitable for the target applications. The packaging of the GaN chips using the embedding technology did not deteriorate the performance of the GaN devices.
We have run an ambitious PCB-demonstrator plan using materials, processes and technologies developed within the project, and with the goal of achieving very high-levels of miniaturization and packaging integration – as well be appropriate for next generation PoLs, iVRs and gate drivers systems in-package or on-chip. At chip-level, a combined BiCMOS and GaN wafer design, new planarization process for the BiCMOS line and an aligned direct wafer bonding process flow were developed.
The evaluation of the industrialization potential of the technology did not show real showstoppers on the manufacturability, supply chain and business models. The main challenge identified for the application of the technology is to get a good area match-up of CMOS and GaN to make the wafer-wafer bonding economically feasible.
The project also documented the business case, quantifying the value proposition of the GaNonCMOS technologies for the most promising markets (data centers and automotive). All partners compiled a list of key exploitable results, reporting first exploitation success stories such it is already the case for AT&S, TNIUCC and EpiGaN/SOITEC.
Granular dynamically variable multiple voltage domain VRMs are needed to improve the energy efficiency of all computing systems. This has been addressed by various attempts at building on-chip VRMs. These VRMs consist of buck-converters that are built using CMOS power switches and controllers on the CPU chip with the large passives
(inductors and capacitors) built off-chip. The current VRM prototypes are limited to a specific voltage conversion ratio because of the breakdown characteristics of the CMOS transistor. In this context, GaN switch can be a game changing device that enables large voltage ratio conversion due to its larger breakdown voltage. Within GaNonCMOS we explored innovative fabrication techniques that bring the GaN devices close to CMOS chips or embedded within them, and packaging techniques that enable passive components embedded within laminate along with new magnetic core materials.
At the materials and devices level, progress beyond the state of the art is targeted at the power switches and magnetic materials. Regarding the power switching, GaN on Si is currently typically used for devices targeting the 650V node, operating at frequencies between 50kHz and 700kHz. The epiwafers used for the 650V node have a destructive breakdown voltage rating that is several hundreds of Volts higher than the operating voltage. This project required GaN switches and epiwafers that combine a medium breakdown voltage with very low sheet resistance. GaNonCMOs made a significant step forward in the development of ultra-low loss switches for specific low voltage applications using very low sheet resistance epiwafers as well as minimized ohmic contact and pad areas. Regarding the magnetic materials, integrated passives with magnetic cores have been fabricated for a long time, however existing commercial solutions are based on air-core technology. This highlights the challenges to integrate a magnetic core using standard MEMS processing. A key aspect of this challenge is the development of high performance, reliable magnetic films with high flux density to achieve miniaturization. GaNonCMOS developed novel nanocrystalline soft magnetic thin film materials and new integration techniques to realize high performance passive devices.